Product Information

AD8351ACPZ-R7

AD8351ACPZ-R7 electronic component of Analog Devices

Datasheet
Differential Amplifier 1 Circuit 16-LFCSP-WQ (3x3)

Manufacturer: Analog Devices
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1500: USD 6.6892 ea
Line Total: USD 10033.8

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MOQ: 1500  Multiples: 1500
Pack Size: 1500
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Ships to you between Wed. 15 May to Tue. 21 May

MOQ : 1500
Multiples : 1500

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AD8351ACPZ-R7
Analog Devices

1500 : USD 3.8977

0 - WHS 2


Ships to you between Wed. 15 May to Tue. 21 May


Multiples : 1

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AD8351ACPZ-R7
Analog Devices


0 - WHS 3


Ships to you between Tue. 21 May to Thu. 23 May

MOQ : 1
Multiples : 1

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AD8351ACPZ-R7
Analog Devices

1 : USD 11.9855
10 : USD 10.4202
25 : USD 9.9288
100 : USD 8.2869
250 : USD 7.9234
500 : USD 7.2207
1000 : USD 6.5907

     
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Low Distortion Differential RF/IF Amplifier Data Sheet AD8351 FEATURES FUNCTIONAL BLOCK DIAGRAM 3 dB bandwidth of 2.2 GHz for A = 12 dB V AD8351 Single resistor programmable gain: 0 dB A 26 dB V VOCM BIAS CELL PWUP Differential interface VPOS Low noise input stage 2.7 nV/Hz at A = 10 dB V RGP1 Low harmonic distortion OPHI INHI 79 dBc second at 70 MHz 81 dBc third at 70 MHz OPLO INLO OIP3 of 31 dBm at 70 MHz COMM RGP2 Single-supply operation: 3 V to 5.5 V Low power dissipation: 28 mA at 5 V 0 Adjustable output common-mode voltage AD8351 WITH 10dB OF 100nF GAIN DRIVING THE 25 10 INHI AD6645 (R = 1k) Fast settling and overdrive recovery L AD6645 ANALOG INPUT = 70MHz R G 20 AD8351 14-BIT ENCORE = 80MHz 200 Slew rate of 13,000 V/s SNR = 69.1dB ADC 30 FUND = 1.1dBFS INLO Power-down capability HD2 = 78.5dBc 25 100nF 40 HD3 = 80.7dBc THD = 75.9dBc 50 SFDR = 78.2dBc APPLICATIONS 60 Differential ADC drivers 70 2 3 Single-ended-to-differential conversion 80 + IF sampling receivers 90 RF/IF gain blocks 100 SAW filter interfacing 110 120 130 Figure 1. GENERAL DESCRIPTION The AD8351 is a low cost differential amplifier useful in RF and differential configuration. The exceptionally good distortion IF applications up to 2.2 GHz. The voltage gain can be set from performance makes the AD8351 an ideal solution for 12-bit and unity to 26 dB using a single external gain resistor. The AD8351 14-bit IF sampling receiver designs. provides a nominal 150 differential output impedance. The Fabricated in Analog Devices, Inc., high speed XFCB process, excellent distortion performance and low noise characteristics the AD8351 has high bandwidth that provides high frequency of this device allow for a wide range of applications. performance and low distortion. The quiescent current of the The AD8351 is designed to satisfy the demanding performance AD8351 is 28 mA typically. The AD8351 amplifier comes in a requirements of communications transceiver applications. The compact 10-lead MSOP package or in a 16-lead LFCSP package, device can be used as a general-purpose gain block, an ADC and operates over the temperature range of 40C to +85C. driver, and a high speed data interface driver, among other functions. The AD8351 can also be used as a single-ended-to- differential amplifier with similar distortion products as in the Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20032015 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 03145-001AD8351 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Gain Adjustment ........................................................................ 12 Applications ....................................................................................... 1 Common-Mode Adjustment .................................................... 12 Functional Block Diagram .............................................................. 1 Input and Output Matching ...................................................... 12 General Description ......................................................................... 1 Single-Ended-to-Differential Operation ................................. 13 Revision History ............................................................................... 2 ADC Driving ............................................................................... 13 Specif icat ions ..................................................................................... 3 Analog Multiplexing .................................................................. 14 Absolute Maximum Ratings ............................................................ 5 I/O Capacitive Loading ............................................................. 14 ESD Caution .................................................................................. 5 Transmission Line Effects ......................................................... 15 Pin Configurations and Function Descriptions ........................... 6 Characterization Setup .............................................................. 16 Typical Performance Characteristics ............................................. 7 Evaluation Board ............................................................................ 17 Theory of Operation ...................................................................... 12 Outline Dimensions ....................................................................... 19 Basic Concepts ............................................................................ 12 Ordering Guide ............................................................................... 19 REVISION HISTORY 1/15Rev. C to Rev. D Changes to Noise Distortion Parameter, Table 1 .......................... 3 Changes to Ordering Guide .......................................................... 19 3/14Rev. B to Rev. C Updated Format .................................................................. Universal Added 16-Lead LFCSP Package................................... Throughout Changes to Features .......................................................................... 1 Changes to Table 3 and Added Figure 3 Renumbered Sequentially ....................................................................................... 6 Updated Outline Dimensions Added Figure 52 ........................ 19 Moved, Changes to Ordering Guide ............................................ 19 2/04Rev. A to Rev. B Changes to Ordering Guide ............................................................ 4 Changes to TPC 4 ............................................................................. 5 3/03Rev. 0 to Rev. A Changes to Ordering Guide ............................................................ 4 Change to Table 3 ........................................................................... 15 3/03Revision 0: Initial Version Rev. D Page 2 of 19

Tariff Desc

8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

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