LF to 2.7 GHz Dual 60 dB TruPwr Detector Data Sheet AD8364 FEATURES FUNCTIONAL BLOCK DIAGRAM RMS measurement of high crest-factor signals Dual-channel and channel difference outputs ports 24 23 22 21 20 19 18 17 Integrated accurately scaled temperature sensor TEMP VGA Wide dynamic range 1 dB over 60 dB CONTROL VPSA 25 16 VSTA 0.5 dB temperature-stable linear-in-dB response 2 I SIG Low log conformance ripple INHA 26 15 OUTA CHANNEL A +5 V operation at 70 mA, 40C to +85C TruPwr 2 I TGT INLA 27 14 FBKA Small footprint, 5 mm 5 mm, LFCSP PWDN 28 13 OUTP OUTA APPLICATIONS OUTB COMR 29 12 OUTN Wireless infrastructure power amplifier linearization/control INLB 30 11 FBKB Antenna VSWR monitor 2 I SIG CHANNEL B Gain and power control and measurement TruPwr INHB 31 10 OUTB 2 I TGT Transmitter signal strength indication (TSSI) VPSB 32 9 VSTB Dual-channel wireless infrastructure radios VGA CONTROL BIAS 1 2 3 4 5 6 7 8 Figure 1. Functional Block Diagram GENERAL DESCRIPTION The AD8364 is a true rms, responding, dual-channel RF power Integrated in the AD8364 are two matched AD8362 channels measurement subsystem for the precise measurement and control (see the AD8362 data sheet for more information) with improved of signal power. The flexibility of the AD8364 allows communi- temperature performance and reduced log conformance ripple. cations systems, such as RF power amplifiers and radio transceiver Enhancements include improved temperature performance and AGC circuits, to be monitored and controlled with ease. Operating reduced log-conformance ripple compared to the AD8362. On- chip wide bandwidth output operational amplifiers are connected on a single 5 V supply, each channel is fully specified for operation up to 2.7 GHz over a dynamic range of 60 dB. The AD8364 to accom-modate flexible configurations that support many provides accurately scaled, independent, rms outputs of both RF system solutions. measurement channels. Difference output ports, which measure The device can easily be configured to provide four rms the difference between the two channels, are also available. The measurements simultaneously. Linear-in-dB rms measurements on-chip channel matching makes the rms channel difference are supplied at OUTA and OUTB, with conveniently scaled outputs extremely stable with temperature and process variations. slopes of 50 mV/dB. The rms difference between OUTA and The device also includes a useful temperature sensor with an OUTB is available as differential or single-ended signals at accurately scaled voltage proportional to temperature, specified OUTP and OUTN. An optional voltage applied to VLVL over the device operating temperature range. The AD8364 can provides a common mode reference level to offset OUTP and be used with input signals having rms values from 55 dBm to OUTN above ground. +5 dBm referred to 50 and large crest factors with no The AD8364 is supplied in a 32-lead, 5 mm 5 mm LFCSP, for accuracy degradation. the operating temperature of 40C to +85C. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20052016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com CHPB CHPA DECB DECA COMB COMA ADJB VPSR ADJA ACOM VREF TEMP VLVL ACOM CLPB CLPA 05334-001AD8364 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Controller Mode ......................................................................... 22 Applications ....................................................................................... 1 RF Measurement Mode Basic Connections ........................... 23 Functional Block Diagram .............................................................. 1 Controller Mode Basic Connections ....................................... 24 General Description ......................................................................... 1 Constant Output Power Operation .......................................... 27 Revision History ............................................................................... 2 Gain-Stable Transmitter/Receiver ............................................ 29 Specifications ..................................................................................... 3 Temperature Compensation Adjustment................................ 31 Absolute Maximum Ratings ............................................................ 7 Device Calibration and Error Calculation .............................. 31 ESD Caution .................................................................................. 7 Selecting Calibration Points to Improve Accuracy over a Reduced Range ........................................................................... 32 Pin Configuration and Function Descriptions ............................. 8 Channel Isolation ....................................................................... 34 Typical Performance Characteristics ............................................. 9 Altering the Slope ....................................................................... 35 Theory of Operation ...................................................................... 18 Choosing the Right Value for CHP A, B and CLP A, B .... 36 Square Law Detector and Amplitude Target........................... 19 RF Burst Response Time ........................................................... 36 RF Input Interface ...................................................................... 19 Single-Ended Input Operation ................................................. 36 Offset Compensation ................................................................. 19 Printed Circuit Board Considerations ..................................... 37 Temperature Sensor Interface ................................................... 20 Package Considerations ............................................................. 37 VREF Interface ........................................................................... 20 Description of Characterization ............................................... 38 Power-Down Interface ............................................................... 20 Basis for Error Calculations ...................................................... 38 VST A, B Interface .................................................................... 20 Evaluation Board ........................................................................ 40 OUT A, B, P, N Outputs .......................................................... 21 Outline Dimensions ....................................................................... 41 Measurement Channel Difference Output Using OUT P, N ....................................................................................................... 22 Ordering Guide .......................................................................... 41 REVISION HISTORY 8/2016Rev. B to Rev. C Deleted Figure 85 and Figure 86 Renumbered Sequentially ... 41 Updated Outline Dimensions ....................................................... 41 Updated Outline Dimensions ....................................................... 41 Changes to Ordering Guide .......................................................... 41 Changes to Ordering Guide .......................................................... 41 Deleted Table 7, AD8364-EVAL-500 Evaluation Board 1/2012Rev. A to Rev. B Configuration Options and AD8364-EVAL-2140 Evaluation Change to Figure 84 ....................................................................... 40 Board Configuration Options Renumbered Sequentially ....... 42 Deleted Evaluation Boards Section and Figure 87 ..................... 44 11/2011Rev. 0 to Rev. A Deleted Figure 88 ............................................................................ 45 Changes to Figure 2 .......................................................................... 8 Deleted Assembly Drawings Section, Figure 89, and Changes to Automatic Power Control Section ........................... 24 Figure 90 .......................................................................................... 46 Replaced Evaluation and Characterization Circuit Board Layouts Section with Evaluation Board Section ......................... 40 4/2005Revision 0: Initial Version Changes to Figure 84 ...................................................................... 40 Rev. C Page 2 of 44