Dual, 16-Bit, 12.6 GSPS RF DAC with Channelizers Data Sheet AD9172 FEATURES GENERAL DESCRIPTION Supports multiband wireless applications The AD9172 is a high performance, dual, 16-bit digital-to-analog 3 bypassable, complex data input channels per RF DAC converter (DAC) that supports DAC sample rates to 12.6 GSPS. 1.54 GSPS maximum complex input data rate per input The device features an 8-lane, 15 Gbps JESD204B data input port, channel a high performance, on-chip DAC clock multiplier, and digital 1 independent NCO per input channel signal processing capabilities targeted at single-band and multiband Proprietary, low spurious and distortion design direct to radio frequency (RF) wireless applications. 2-tone intermodulation distortion (IMD) = 83 dBc at The AD9172 features three complex data input channels per RF 1.8 GHz, 7 dBFS/tone RF output DAC that are bypassable. Each data input channel includes a Spurious free dynamic range (SFDR) <80 dBc at 1.8 GHz, configurable gain stage, an interpolation filter, and a channel 7 dBFS RF output numerically controlled oscillator (NCO) for flexible, multiband Flexible 8-lane, 15.4 Gbps JESD204B interface frequency planning. The device supports up to a 1.5 GSPS complex Supports single-band and multiband use cases data rate per input channel and is capable of aggregating multiple Supports 12-bit high density mode for increased data complex input data streams up to a maximum complex data rate throughput of 1.5 GSPS. Additionally, the AD9172 supports ultrawide Multiple chip synchronization bandwidth modes bypassing the channelizers to provide Supports JESD204B Subclass 1 maximum data rates of up to 3.08 GSPS (with 16-bit resolution) Selectable interpolation filter for a complete set of input and 4.1 GSPS (with 12-bit resolution). data rates The AD9172 is available in a 144-ball BGA ED package. 1, 2, 3, 4, 6, and 8 configurable data channel interpolation PRODUCT HIGHLIGHTS 1, 2, 4, 6, 8, and 12 configurable final interpolation 1. Supports single-band and multiband wireless applications Final 48-bit NCO that operates at the DAC rate to support with three bypassable complex data input channels per RF frequency synthesis up to 6 GHz DAC at a maximum complex input data rate of 1.5 GSPS. Transmit enable function allows extra power saving and One independent NCO per input channel. downstream circuitry protection 2. Ultrawide bandwidth channel bypass modes supporting up High performance, low noise PLL clock multiplier to 3 GSPS data rates with 16-bit resolution and 4 GSPS Supports 12.6 GSPS DAC update rate with 12-bit resolution. Observation ADC clock driver with selectable divide ratios 3. Low power dual converter decreases the amount of power Low power consumption needed in high bandwidth and multichannel 2.55 W at 12 GSPS, dual channel mode applications. 10 mm 10 mm, 144-ball BGA ED with metal enhanced thermal lid, 0.80 mm pitch APPLICATIONS Wireless communications infrastructure Multiband base station radios Microwave/E-band backhaul systems Instrumentation, automatic test equipment (ATE) Radars and jammers Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20172019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. AD9172 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Serial Port Options ..................................................................... 30 Applications ....................................................................................... 1 JESD204B Serial Data Interface .................................................... 32 General Description ......................................................................... 1 JESD204B Overview .................................................................. 32 Product Highlights ........................................................................... 1 Physical Layer ............................................................................. 35 Revision History ............................................................................... 3 Data Link Layer .......................................................................... 38 Functional Block Diagram .............................................................. 4 Syncing LMFC Signals ............................................................... 40 Specifications ..................................................................................... 5 Transport Layer .......................................................................... 46 DC Specifications ......................................................................... 5 JESD204B Test Modes ............................................................... 47 Digital Specifications ................................................................... 6 JESD204B Error Monitoring ..................................................... 48 Maximum DAC Sampling Rate Specifications ......................... 6 Digital Datapath ............................................................................. 51 Power Supply DC Specifications ................................................ 7 Total Datapath Interpolation .................................................... 51 Serial Port and CMOS Pin Specifications ............................... 10 Channel Digital Datapath ......................................................... 53 Digital Input Data Timing Specifications ............................... 11 Main Digital Datapath ............................................................... 56 JESD204B Interface Electrical and Speed Specifications ...... 12 Interrupt Request Operation ........................................................ 62 Input Data Rates and Signal Bandwidth Specifications ........ 13 Interrupt Service Routine .......................................................... 62 AC Specifications ........................................................................ 14 Applications Information .............................................................. 63 Absolute Maximum Ratings .......................................................... 16 Hardware Considerations ......................................................... 63 Reflow Profile .............................................................................. 16 Analog Interface Considerations .................................................. 66 Thermal Characteristics ............................................................ 16 DAC Input Clock Configurations ............................................ 66 ESD Caution ................................................................................ 16 Clock Output Driver .................................................................. 68 Pin Configuration and Function Descriptions ........................... 17 Analog Outputs .......................................................................... 68 Typical Performance Characteristics ........................................... 20 Start-Up Sequence .......................................................................... 69 Terminology .................................................................................... 27 Register Summary .......................................................................... 76 Theory of Operation ...................................................................... 28 Register Details ............................................................................... 84 Serial Port Operation ..................................................................... 30 Outline Dimensions ..................................................................... 145 Data Format ................................................................................ 30 Ordering Guide ........................................................................ 145 Serial Port Pin Descriptions ...................................................... 30 Rev. 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