Octal, 10-Bit, 40 MSPS/65 MSPS, Serial LVDS, 1.8 V ADC Data Sheet AD9212 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD PDWN DRVDD DRGND 8 analog-to-digital converters (ADCs) integrated into 1 package 100 mW ADC power per channel at 65 MSPS AD9212 10 SNR = 60.8 dB (to Nyquist) VIN + A D + A SERIAL ADC D A LVDS VIN A ENOB = 9.8 bits 10 SFDR = 80 dBc (to Nyquist) VIN + B D + B SERIAL ADC Excellent linearity D B VIN B LVDS DNL = 0.3 LSB (typical) INL = 0.4 LSB (typical) 10 VIN + C D + C SERIAL Serial LVDS (ANSI-644, default) ADC D C VIN C LVDS Low power, reduced signal option (similar to IEEE 1596.3) 10 VIN + D D + D SERIAL Data and frame clock outputs ADC LVDS D D VIN D 325 MHz, full-power analog bandwidth 10 2 V p-p input voltage range VIN + E SERIAL D + E ADC D E VIN E LVDS 1.8 V supply operation 10 Serial port control VIN + F D + F SERIAL ADC D F Full-chip and individual-channel power-down modes VIN F LVDS Flexible bit orientation 10 VIN + G D + G SERIAL ADC Built-in and custom digital test pattern generation D G VIN G LVDS Programmable clock and data alignment 10 VIN + H SERIAL D + H Programmable output resolution ADC LVDS D H VIN H Standby mode VREF SENSE FCO+ APPLICATIONS 0.5V FCO DATA RATE Medical imaging and nondestructive ultrasound REFT REF MULTIPLIER SERIAL PORT DCO+ REFB SELECT Portable ultrasound and digital beam-forming systems INTERFACE DCO Quadrature radio receivers Diversity radio receivers RBIAS AGND CSB SDIO/ SCLK/ CLK+ CLK ODM DTP Tape drives Figure 1. Optical networking The ADC contains several features designed to maximize Test equipment flexibility and minimize system cost, such as programmable GENERAL DESCRIPTION clock and data alignment and programmable digital test pattern The AD9212 is an octal, 10-bit, 40 MSPS/65 MSPS ADC with an generation. The available digital test patterns include built-in on-chip sample-and-hold circuit designed for low cost, low power, deterministic and pseudorandom patterns, along with custom user- small size, and ease of use. Operating at a conversion rate of up to defined test patterns entered via the serial port interface (SPI). 65 MSPS, it is optimized for outstanding dynamic performance The AD9212 is available in a RoHS-compliant, 64-lead LFCSP. It is and low power in applications where a small package size is critical. specified over the industrial temperature range of 40C to +85C. The ADC requires a single 1.8 V power supply and LVPECL-/ PRODUCT HIGHLIGHTS CMOS-/LVDS-compatible sample rate clock for full performance 1. Small Footprint. Eight ADCs are contained in a small package. operation. No external reference or driver components are 2. Low Power of 100 mW per Channel at 65 MSPS. required for many applications. 3. Ease of Use. A data clock output (DCO) operates up to The ADC automatically multiplies the sample rate clock for 300 MHz and supports double data rate (DDR) operation. the appropriate LVDS serial data rate. A data clock (DCO) 4. User Flexibility. SPI control offers a wide range of flexible for capturing data on the output and a frame clock (FCO) for features to meet specific system requirements. signaling a new output byte are provided. Individual channel 5. Pin-Compatible Family. This includes the AD9222 (12-bit) power-down is supported and typically consumes less than and AD9252 (14-bit). 2 mW when all channels are disabled. Rev. F Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20062018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 05968-001AD9212 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Clock Input Considerations ...................................................... 23 Applications ....................................................................................... 1 Serial Port Interface (SPI) .............................................................. 31 General Description ......................................................................... 1 Hardware Interface ..................................................................... 31 Functional Block Diagram .............................................................. 1 Memory Map .................................................................................. 33 Product Highlights ........................................................................... 1 Reading the Memory Map Table .............................................. 33 Revision History ............................................................................... 3 Reserved Locations .................................................................... 33 Specifications ..................................................................................... 4 Default Values ............................................................................. 33 AC Specifications .......................................................................... 5 Logic Levels ................................................................................. 33 Digital Specifications ................................................................... 6 Applications Information .............................................................. 36 Switching Specifications .............................................................. 7 Design Guidelines ...................................................................... 36 Timing Diagrams .......................................................................... 8 Evaluation Board ............................................................................ 37 Absolute Maximum Ratings .......................................................... 10 Power Supplies ............................................................................ 37 Thermal Impedance ................................................................... 10 Input Signals................................................................................ 37 ESD Caution ................................................................................ 10 Output Signals ............................................................................ 37 Pin Configuration and Function Descriptions ........................... 11 Default Operation and Jumper Selection Settings ................. 38 Equivalent Circuits ......................................................................... 13 Alternative Analog Input Drive Configuration...................... 39 Typical Performance Characteristics ........................................... 15 Outline Dimensions ....................................................................... 56 Theory of Operation ...................................................................... 20 Ordering Guide .......................................................................... 56 Analog Input Considerations .................................................... 20 Rev. F Page 2 of 56