Octal LNA/VGA/AAF/14-Bit ADC and CW I/Q Demodulator AD9277 FEATURES APPLICATIONS 8 channels of LNA, VGA, AAF, ADC, and I/Q demodulator Medical imaging/ultrasound Low noise preamplifier (LNA) Automotive radar Input-referred noise: 0.75 nV/Hz typical at 5 MHz PRODUCT HIGHLIGHTS (gain = 21.3 dB) SPI-programmable gain: 15.6 dB/17.9 dB/21.3 dB 1. Small Footprint. Single-ended input: V maximum = 733 mV p-p/ IN Eight channels are contained in a small, space-saving 550 mV p-p/367 mV p-p package. Full TGC path, ADC, and I/Q demodulator Dual-mode active input impedance matching contained within a 100-lead, 16 mm 16 mm TQFP. Bandwidth (BW) > 100 MHz 2. Low Power. Full-scale (FS) output: 4.4 V p-p differential Variable gain amplifier (VGA) In TGC mode, low power of 207 mW per channel Attenuator range: 42 dB to 0 dB at 50 MSPS. In CW mode, ultralow power of 94 mW Postamp gain: 21 dB/24 dB/27 dB/30 dB per channel. Linear-in-dB gain control 3. Integrated High Dynamic Range I/Q Demodulator with Antialiasing filter (AAF) Phase Rotation. Programmable second-order LPF from 8 MHz to 18 MHz Programmable HPF 4. Ease of Use. Analog-to-digital converter (ADC) A data clock output (DCO) operates up to 480 MHz 14 bits at 10 MSPS to 50 MSPS and supports double data rate (DDR) operation. SNR: 73 dB 5. User Flexibility. SFDR: 75 dB Serial port interface (SPI) control offers a wide range of Serial LVDS (ANSI-644, IEEE 1596.3 reduced range link) flexible features to meet specific system requirements. Data and frame clock outputs CW mode I/Q demodulator 6. Integrated Second-Order Antialiasing Filter. Individual programmable phase rotation This filter is placed before the ADC and is programmable Output dynamic range per channel >160 dBFS/Hz from 8 MHz to 18 MHz. Low power: 207 mW per channel at 14 bits/50 MSPS (TGC), 94 mW per channel for CW Doppler Flexible power-down modes Overload recovery in <10 ns Fast recovery from low power standby mode: <2 s 100-lead TQFP EP FUNCTIONAL BLOCK DIAGRAM AVDD1 AVDD2 PDWN STBY DRVDD LO-A TO LO-H I/Q 8 CHANNELS DEMODULATOR LOSW-A TO LOSW-H LI-A TO LI-H DOUTA+ TO DOUTH+ 14-BIT SERIAL LNA VGA ADC LVDS AAF LG-A TO LG-H DOUTA TO DOUTH FCO+ DATA SERIAL FCO LO RATE REFERENCE PORT DCO+ GENERATION MULTIPLIER INTERFACE DCO Figure 1. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. RESET 4LO+ 4LO GAIN+ GAIN CWI CWI+ CWQ CWQ+ VREF RBIAS GPO 0:3 CSB SCLK SDIO CLK+ CLK 08181-001AD9277 TABLE OF CONTENTS Features .............................................................................................. 1 Ultrasound .................................................................................. 21 Applications ....................................................................................... 1 Channel Overview ..................................................................... 22 Product Highlights ........................................................................... 1 Input Overdrive .......................................................................... 25 Functional Block Diagram .............................................................. 1 CW Doppler Operation ............................................................. 25 Revision History ............................................................................... 2 TGC Operation ........................................................................... 29 General Description ......................................................................... 3 ADC ............................................................................................. 33 Specif icat ions ..................................................................................... 4 Clock Input Considerations ...................................................... 33 AC Specifications .......................................................................... 4 Digital Outputs and Timing ..................................................... 35 Digital Specifications ................................................................... 7 Serial Port Interface (SPI) .............................................................. 39 Switching Specifications .............................................................. 8 Hardware Interface ..................................................................... 40 ADC Timing Diagrams ............................................................... 9 Memory Map .................................................................................. 41 Absolute Maximum Ratings .......................................................... 10 Reading the Memory Map Table .............................................. 41 Thermal Impedance ................................................................... 10 Reserved Locations .................................................................... 41 ESD Caution ................................................................................ 10 Default Values ............................................................................. 41 Pin Configuration and Function Descriptions ........................... 11 Logic Levels ................................................................................. 41 Typical Performance Characteristics ........................................... 14 Applications Information .............................................................. 45 TGC Mode ................................................................................... 14 Power and Ground Recommendations ................................... 45 CW Doppler Mode ..................................................................... 17 Exposed Paddle Thermal Heat Slug Recommendations ...... 45 Equivalent Circuits ......................................................................... 19 Outline Dimensions ....................................................................... 46 Theory of Operation ...................................................................... 21 Ordering Guide .......................................................................... 46 REVISION HISTORY 7/09Revision 0: Initial Version Rev. 0 Page 2 of 48