8-Bit, 250 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC) Data Sheet AD9284 FEATURES GENERAL DESCRIPTION Single 1.8 V supply operation The AD9284 is a dual 8-bit, monolithic sampling, analog-to-digital SNR: 49.3 dBFS at 200 MHz input at 250 MSPS converter (ADC) that supports simultaneous operation and is SFDR: 65 dBc at 200 MHz input at 250 MSPS optimized for low cost, low power, and ease of use. Each ADC Low power: 314 mW at 250 MSPS operates at up to a 250 MSPS conversion rate with outstanding On-chip reference and track-and-hold dynamic performance. 1.2 V p-p analog input range for each channel The ADC requires a single 1.8 V supply and an encode clock Differential input with 500 MHz bandwidth for full performance operation. No external reference LVDS-compliant digital output components are required for many applications. The digital DNL: 0.2 LSB outputs are LVDS compatible. Serial port control options The AD9284 is available in a Pb-free, 48-lead LFCSP that is Offset binary, Gray code, or twos complement data format specified over the industrial temperature range of 40C to +85C. Optional clock duty cycle stabilizer Built-in selectable digital test pattern generation PRODUCT HIGHLIGHTS Pin-programmable power-down function 1. Integrated Dual 8-Bit, 250 MSPS ADC. Available in 48-lead LFCSP 2. Single 1.8 V Supply Operation with LVDS Outputs. APPLICATIONS 3. Power-Down Option Controlled via a Pin-Programmable Setting. Communications Diversity radio systems I/Q demodulation systems Battery-powered instruments Handheld scope meters Low cost digital oscilloscopes OTS: video over fiber FUNCTIONAL BLOCK DIAGRAM SDIO/ PWDN CSB SCLK OE CLK+ SPI CLK VIN+A D7+ (MSB), D7 (MSB) ADC D0+ (LSB), D0 (LSB) VINA (CHANNEL A) VCM REF DCO+ VREF 1.5 DCO SELECT CLOCK GENERATION 1.0V DCO MANAGEMENT V REF VINB D7+ (MSB), D7 (MSB) ADC D0+ (LSB), D0 (LSB) (CHANNEL B) VIN+B AD9284 RBIAS AGND AVDD DRVDD DRGND Figure 1. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 20112020 Analog Devices, Inc. All rights reserved. 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LVDS LVDS OUTPUT BUFFER OUTPUT BUFFER 09085-001AD9284 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Voltage Reference ...................................................................... 13 Applications ...................................................................................... 1 RBIAS ........................................................................................... 13 General Description ......................................................................... 1 Clock Input Considerations ..................................................... 14 Product Highlights ........................................................................... 1 Digital Outputs ........................................................................... 14 Functional Block Diagram .............................................................. 1 Built-In Self-Test (BIST) and Output Test ................................. 15 Revision History ............................................................................... 2 Built-In Self-Test (BIST) ........................................................... 15 Specifications .................................................................................... 3 Output Test Modes .................................................................... 15 DC Specifications ......................................................................... 3 Serial Port Interface (SPI) ............................................................. 16 AC Specifications ......................................................................... 4 Configuration Using the SPI .................................................... 16 Digital Specifications ................................................................... 5 Hardware Interface .................................................................... 17 Switching Specifications .............................................................. 6 Configuration Without the SPI ................................................ 17 SPI Timing Specifications ........................................................... 6 SPI Accessible Features ............................................................. 17 Absolute Maximum Ratings ........................................................... 7 Memory Map .................................................................................. 18 Thermal Resistance ...................................................................... 7 Reading the Memory Map Register Table .............................. 18 ESD Caution.................................................................................. 7 Memory Map Register Table .................................................... 19 Pin Configuration and Function Descriptions ............................ 8 Memory Map Register Descriptions ....................................... 21 Typical Performance Characteristics ........................................... 10 Applications Information ............................................................. 22 Equivalent Circuits ......................................................................... 12 Design Guidelines ...................................................................... 22 Theory of Operation ...................................................................... 13 Outline Dimensions ....................................................................... 23 ADC Architecture ...................................................................... 13 Ordering Guide .......................................................................... 23 Analog Input Considerations ................................................... 13 REVISION HISTORY 9/2020Rev. A to Rev. B Changed CP-48-12 to CP-48-14 ................................. Throughout 6/2013Rev. 0 to Rev. A Changes to Figure 3 .......................................................................... 8 Changes to Clock Input Parameters, Table 4 ................................ 6 Updated Outline Dimensions ....................................................... 23 Changes to Ordering Guide .......................................................... 23 1/2011Revision 0: Initial Version Rev. B Page 2 of 24