Ultralow Distortion, Wide Bandwidth Voltage Feedback Op Amps Data Sheet AD9631/AD9632 FEATURES PIN CONFIGURATION Wide bandwidth AD9631/ 1 8 NC NC AD9631, G = +1 AD9632 INPUT 2 7 +V S AD9632, G = +2 +INPUT 3 6 OUTPUT Small signal V 4 TOP VIEW 5 NC S AD9631, 320 MHz (Not to Scale) AD9632, 250 MHz NOTES 1. NC = NO CONNECT. Large signal (4 V p-p) Figure 1. 8-Lead PDIP (N) and SOIC (R) Packages AD9631, 175 MHz AD9632, 180 MHz A proprietary design architecture has produced an amplifier Ultralow distortion (SFDR), low noise that combines many of the best characteristics of both current 113 dBc typical 1 MHz feedback and voltage feedback amplifiers. The AD9631/AD9632 95 dBc typical 5 MHz exhibit exceptionally fast and accurate pulse response (16 ns to 72 dBc typical 20 MHz 0.01%) as well as extremely wide small signal and large signal 46 dBm third-order intercept 25 MHz bandwidth and ultralow distortion. The AD9631 achieves 7.0 nV/Hz spectral noise density 72 dBc at 20 MHz, 320 MHz small signal bandwidth, and High speed 175 MHz large signal bandwidths. Slew rate: 1300 V/s These characteristics position the AD9631/AD9632 ideally for Settling time to 0.01%, 2 V step: 16 ns driving flash as well as high resolution ADCs. Additionally, the 3 V to 5 V supply operation balanced high impedance inputs of the voltage feedback archi- 17 mA supply current tecture allow maximum flexibility when designing active filters. APPLICATIONS The AD9631/AD9632 are offered in the industrial (40C to ADC input driver +85C) temperature range. They are available in PDIP and SOIC. Differential amplifiers 30 V = 5V S IF/RF amplifiers R = 500 L 40 Pulse amplifiers V = 2V p-p OUT 50 Professional video DAC current to voltage 60 Baseband and video communications 70 Pin diode receivers 80 Active filters/integrators/log amps 90 SECOND HARMONIC GENERAL DESCRIPTION 100 The AD9631/AD9632 are very high speed and wide bandwidth 110 THIRD HARMONIC amplifiers. The AD9631 is unity gain stable. The AD9632 is 120 stable at gains of 2 or greater. Using a voltage feedback 130 architecture, the exceptional settling time, bandwidth, and low 10k 100k 1M 10M 100M distortion of the AD9631/AD9632 meet the requirements of FREQUENCY (Hz) many applications that previously depended on current feed- Figure 2. AD9631 Harmonic Distortion vs. Frequency, G = +1 back amplifiers. Its classical op amp structure works much more predictably in many designs. Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2014 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. HARMONIC DISTORTION (dBc) 00601-001 00601-002AD9631/AD9632 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 General......................................................................................... 15 Applications ....................................................................................... 1 Feedback Resistor Choice.......................................................... 15 General Description ......................................................................... 1 Pulse Response ........................................................................... 16 Pin Configuration ............................................................................. 1 Large Signal Performance ......................................................... 16 Revision History ............................................................................... 2 Power Supply Bypassing ............................................................ 16 Specifications ..................................................................................... 3 Driving Capacitive Loads .......................................................... 16 Electrical Characteristics ............................................................. 3 Applications Information .............................................................. 17 Absolute Maximum Ratings ............................................................ 5 Operation as a Video Line Driver ............................................ 17 Metallization Photo ...................................................................... 5 Active Filters ............................................................................... 17 Thermal Resistance ...................................................................... 5 Analog-to-Digital Converter (ADC) Driver .......................... 18 Maximum Power Dissipation ..................................................... 5 Layout Considerations ............................................................... 18 ESD Caution .................................................................................. 5 Outline Dimensions ....................................................................... 19 Typical Performance Characteristics ............................................. 6 Ordering Guide .......................................................................... 20 Theory of Operation ...................................................................... 15 REVISION HISTORY 2/14Rev. C to Rev. D Changes to Figure 33 ...................................................................... 10 Changes to Analog-to-Digital Converter (ADC) Driver Section and Figure 66 ................................................................................... 18 Updated Outline Dimensions ....................................................... 19 Changes to Ordering Guide .......................................................... 20 7/03Rev. B to Rev. C Deleted Evaluation Boards information .......................... Universal Deleted military CERDIP version .................................... Universal Change to Absolute Maximum Ratings ......................................... 3 Change to TPC 4 ............................................................................... 4 Change to TPC 10............................................................................. 5 Change to Figure 6 ......................................................................... 14 Updated Outline Dimensions ....................................................... 17 1/03Rev. A to Rev. B Deleted DIP (N) Inverter, SOIC (R) Inverter, and DIP (N) Noninverter Evaluation Boards in Figures 1214 ...................... 17 Updated Outline Dimensions ....................................................... 18 Rev. D Page 2 of 20