Dual, Low Power, 8-/10-/12-/14-Bit
TxDAC Digital-to-Analog Converters
Data Sheet
AD9714/AD9715/AD9716/AD9717
FEATURES GENERAL DESCRIPTION
Power dissipation @ 3.3 V, 2 mA output The AD9714/AD9715/AD9716/AD9717 are pin-compatible,
37 mW @ 10 MSPS
dual, 8-/10-/12-/14-bit, low power digital-to-analog converters
86 mW @ 125 MSPS
(DACs) that provide a sample rate of 125 MSPS. These TxDAC
Sleep mode: <3 mW @ 3.3 V
converters are optimized for the transmit signal path of commu-
Supply voltage: 1.8 V to 3.3 V
nication systems. All the devices share the same interface, package,
SFDR to Nyquist
and pinout, providing an upward or downward component
84 dBc @ 1 MHz output
selection path based on performance, resolution, and cost.
75 dBc @ 10 MHz output
The AD9714/AD9715/AD9716/AD9717 offer exceptional ac and
AD9717 NSD @ 1 MHz output, 125 MSPS, 2 mA: 151 dBc/Hz
dc performance and support update rates up to 125 MSPS.
Differential current outputs: 1 mA to 4 mA
The flexible power supply operating range of 1.8 V to 3.3 V and
2 on-chip auxiliary DACs
low power dissipation of the AD9714/AD9715/AD9716/AD9717
CMOS inputs with single-port operation
make them well-suited for portable and low power applications.
Output common mode: adjustable 0 V to 1.2 V
Small footprint 40-lead LFCSP RoHS-compliant package
PRODUCT HIGHLIGHTS
APPLICATIONS
1. Low Power.
DACs operate on a single 1.8 V to 3.3 V supply; total power
Wireless infrastructures
consumption reduces to 35 mW at 125 MSPS with a 1.8 V
Picocell, femtocell base stations
supply. Sleep and power-down modes are provided for low
Medical instrumentation
power idle periods.
Ultrasound transducer excitation
2. CMOS Clock Input.
Portable instrumentation
High speed, single-ended CMOS clock input supports a
Signal generators, arbitrary waveform generators
125 MSPS conversion rate.
3. Easy Interfacing to Other Components.
Adjustable output common mode from 0 V to 1.2 V allows
easy interfacing to other components that accept common-
mode levels greater than 0 V.
Rev. B Document Feedback
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TABLE OF CONTENTS
Features .............................................................................................. 1 Estimating the Overall DAC Pipeline Delay........................... 42
Applications ....................................................................................... 1 Reference Operation .................................................................. 43
General Description ......................................................................... 1 Reference Control Amplifier .................................................... 43
Product Highlights ........................................................................... 1 DAC Transfer Function ............................................................. 44
Revision History ............................................................................... 3 Analog Output ............................................................................ 44
Functional Block Diagram .............................................................. 4 Self-Calibration ........................................................................... 45
Specifications ..................................................................................... 5 Coarse Gain Adjustment ........................................................... 46
DC Specifications ......................................................................... 5 Using the Internal Termination Resistors ............................... 47
Digital Specifications ................................................................... 7 Applications Information .............................................................. 48
AC Specifications .......................................................................... 8 Output Configurations .............................................................. 48
Absolute Maximum Ratings ............................................................ 9 Differential Coupling Using a Transformer ............................... 48
Thermal Resistance ...................................................................... 9 Single-Ended Buffered Output Using an Op Amp ................ 48
ESD Caution .................................................................................. 9 Differential Buffered Output Using an Op Amp ................... 49
Pin Configurations and Function Descriptions ......................... 10 Auxiliary DACs........................................................................... 49
Typical Performance Characteristics ........................................... 18 DAC-to-Modulator Interfacing ................................................ 50
Terminology .................................................................................... 31 Correcting for Nonideal Performance of Quadrature
Modulators on the IF-to-RF Conversion ................................ 50
Theory of Operation ...................................................................... 32
I/Q-Channel Gain Matching .................................................... 50
Serial Peripheral Interface (SPI) ................................................... 33
LO Feedthrough Compensation .............................................. 51
General Operation of the Serial Interface ............................... 33
Results of Gain and Offset Correction .................................... 51
Instruction Byte .......................................................................... 33
Modifying the Evaluation Board to Use the ADL5370 On-
Serial Interface Port Pin Descriptions ..................................... 33
Board Quadrature Modulator................................................... 52
MSB/LSB Transfers..................................................................... 34
Evaluation Board Shematics and Artwork .................................. 53
Serial Port Operation ................................................................. 34
Schematics ................................................................................... 53
Pin Mode ..................................................................................... 34
Silkscreens ................................................................................... 61
SPI Register Map ............................................................................. 35
Bill of Materials ............................................................................... 76
SPI Register Descriptions .............................................................. 36
Outline Dimensions ....................................................................... 79
Digital Interface Operation ........................................................... 40
Ordering Guide .......................................................................... 79
Digital Data Latching and Retimer Block ............................... 41
Rev. B | Page 2 of 80