X-On Electronics has gained recognition as a prominent supplier of AD9744ARZ Digital to Analog Converters - DAC across the USA, India, Europe, Australia, and various other global locations. AD9744ARZ Digital to Analog Converters - DAC are a product manufactured by Analog Devices. We provide cost-effective solutions for Digital to Analog Converters - DAC, ensuring timely deliveries around the world.

AD9744ARZ Analog Devices

AD9744ARZ electronic component of Analog Devices
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Part No.AD9744ARZ
Manufacturer: Analog Devices
Category: Digital to Analog Converters - DAC
Description: Analog Devices Digital to Analog Converters - DAC 14-Bit 210 MSPS
Datasheet: AD9744ARZ Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 15.1419 ea
Line Total: USD 15.14

Availability - 0
MOQ: 1  Multiples: 1
Pack Size: 1
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0
Ship by Fri. 26 Jul to Thu. 01 Aug
MOQ : 1
Multiples : 1
1 : USD 55.0211
10 : USD 48.9383
25 : USD 46.7385
100 : USD 41.7899
250 : USD 39.8654

0
Ship by Fri. 26 Jul to Thu. 01 Aug
MOQ : 27
Multiples : 1
27 : USD 20.5062
108 : USD 18.9306

0
Ship by Fri. 26 Jul to Thu. 01 Aug
MOQ : 1
Multiples : 1
1 : USD 15.1419
10 : USD 14.8286
25 : USD 14.5153
50 : USD 14.202
100 : USD 13.8887
500 : USD 13.5755

0
Ship by Thu. 01 Aug to Mon. 05 Aug
MOQ : 1
Multiples : 1
1 : USD 26.0072
10 : USD 23.9877
27 : USD 22.9192
108 : USD 20.483
270 : USD 19.532
513 : USD 19.0619

   
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14-Bit, 210 MSPS TxDAC D/A Converter Data Sheet AD9744 FEATURES APPLICATIONS High performance member of pin-compatible Wideband communication transmit channel TxDAC product family Direct IFs Excellent spurious-free dynamic range performance Base stations SFDR to Nyquist Wireless local loops 83 dBc at 5 MHz output Digital radio links 80 dBc at 10 MHz output Direct digital synthesis (DDS) 73 dBc at 20 MHz output Instrumentation SNR at 5 MHz output, 125 MSPS: 77 dB Twos complement or straight binary data format FUNCTIONAL BLOCK DIAGRAM Differential current outputs: 2 mA to 20 mA 3.3V Power dissipation: 135 mW at 3.3 V Power-down mode: 15 mW at 3.3 V REFLO AVDD ACOM 150pF On-chip 1.2 V reference 1.2V REF 0.1F AD9744 CMOS-compatible digital interface REFIO CURRENT SOURCE FS ADJ 28-lead SOIC, 28-lead TSSOP, and 32-lead LFCSP packages ARRAY R SET 3.3V DVDD Edge-triggered latches IOUTA SEGMENTED LSB DCOM IOUTB SWITCHES SWITCHES CLOCK MODE CLOCK LATCHES DIGITAL DATA INPUTS (DB13DB0) SLEEP Figure 1. GENERAL DESCRIPTION 1 The AD9744 is a 14-bit resolution, wideband, third generation Edge-triggered input latches and a 1.2 V temperature compensated member of the TxDAC series of high performance, low power band gap reference have been integrated to provide a complete CMOS digital-to-analog converters (DACs). The TxDAC family, monolithic DAC solution. The digital inputs support 3 V CMOS logic families. consisting of pin-compatible 8-, 10-, 12-, and 14-bit DACs, is specifically optimized for the transmit signal path of communi- PRODUCT HIGHLIGHTS cation systems. All of the devices share the same interface options, 1. The AD9744 is the 14-bit member of the pin compatible TxDAC small outline package, and pinout, providing an upward or family, which offers excellent INL and DNL performance. downward component selection path based on performance, 2. Data input supports twos complement or straight binary data resolution, and cost. The AD9744 offers exceptional ac and dc coding. performance while supporting update rates up to 210 MSPS. 3. High speed, single-ended CMOS clock input supports The AD9744s low power dissipation makes it well suited for 210 MSPS conversion rate. portable and low power applications. Its power dissipation can 4. Low power: Complete CMOS DAC function operates on be further reduced to a mere 60 mW with a slight degradation 135 mW from a 2.7 V to 3.6 V single supply. The DAC full- in performance by lowering the full-scale current output. Also, scale current can be reduced for lower power operation, and a a power-down mode reduces the standby power dissipation to sleep mode is provided for low power idle periods. approximately 15 mW. A segmented current source architecture 5. On-chip voltage reference: The AD9744 includes a 1.2 V is combined with a proprietary switching technique to reduce temperature compensated band gap voltage reference. spurious components and enhance dynamic performance. 6. Industry-standard 28-lead SOIC, 28-lead TSSOP, and 32-lead LFCSP packages. 1 Protected by U.S. Patent Numbers 5568145, 5689257, and 5703519. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20032013 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 02913-001AD9744 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Reference Control Amplifier .................................................... 13 Applications ....................................................................................... 1 DAC Transfer Function ............................................................. 14 Functional Block Diagram .............................................................. 1 Analog Outputs .......................................................................... 14 General Description ......................................................................... 1 Digital Inputs .............................................................................. 15 Product Highlights ........................................................................... 1 Clock Input .................................................................................. 15 Revision History ............................................................................... 2 DAC Timing ................................................................................ 16 Specifications ..................................................................................... 3 Power Dissipation....................................................................... 16 DC Specifications ......................................................................... 3 Applying the AD9744 ................................................................ 17 Dynamic Specifications ............................................................... 4 Differential Coupling Using a Transformer ............................ 17 Digital Specifications ................................................................... 5 Differential Coupling Using an Op Amp ................................ 17 Absolute Maximum Ratings ............................................................ 6 Single-Ended Unbuffered Voltage Output .............................. 18 Thermal Characteristics .............................................................. 6 Single-Ended, Buffered Voltage Output Configuration ........ 18 ESD Caution .................................................................................. 6 Power and Grounding Considerations, Power Supply Rejection ...................................................................................... 18 Pin Configurations and Function Descriptions ........................... 7 Evaluation Board ............................................................................ 20 Typical Performance Characteristics ............................................. 8 General Description ................................................................... 20 Terminology .................................................................................... 12 Outline Dimensions ....................................................................... 30 Functional Description .................................................................. 13 Ordering Guide ............................................................................... 31 Reference Operation .................................................................. 13 REVISION HISTORY 12/13Rev. B to Rev. C 5/03Rev. 0 to Rev. A Added 32-Lead LFCSP Package ....................................... Universal Added Table 5 Renumbered Sequentially .................................... 6 Edits to Features ................................................................................. 1 Added Exposed Pad Note to Figure 4 and Table 6, Pin Edits to Product Highlights .............................................................. 1 Configurations and Function Descriptions Section .................... 7 Edits to DC Specifications ................................................................ 2 Moved Terminology Section ......................................................... 12 Edits to Dynamic Specifications ...................................................... 3 Updated Outline Dimensions ....................................................... 30 Edits to Digital Specifications .......................................................... 4 Changes to Ordering Guide .......................................................... 31 Edits to Absolute Maximum Ratings .............................................. 5 4/05Rev. A to Rev. B Edits to Thermal Characteristics ..................................................... 5 Updated Format .................................................................. Universal Edits to Ordering Guide ................................................................... 5 Changes to General Description .................................................... 1 Edits to Pin Configuration ............................................................... 6 Changes to Product Highlights ....................................................... 1 Edits to Pin Function Descriptions ................................................. 6 Changes to DC Specifications ......................................................... 3 Edits to Figure 2 ................................................................................. 7 Changes to Dynamic Specifications ............................................... 4 Replaced TPCs 1, 4, 7, and 8 ............................................................ 8 Changes to Pin Function Description ........................................... 7 Edits to Figure 3 .............................................................................. 10 Changes to Figure 6 and Figure 9 ................................................... 9 Edits to Functional Description ................................................... 10 Inserted New Figure 10 Renumbered Sequentially .................... 9 Added Clock Input Section ........................................................... 12 Changes to Figure 12, Figure 13, Figure 14, and Figure 15 ...... 10 Added Figure 7 ............................................................................... 12 Changes to Figure 22 Caption ...................................................... 11 Edits to DAC Timing Section ....................................................... 12 Inserted New Figure 23 Renumbered Sequentially .................. 11 Edits to Sleep Mode Operation Section....................................... 13 Changes to Functional Description ............................................. 13 Edits to Power Dissipation Section .............................................. 13 Changes to Reference Operation Section .................................... 13 Renumbered Figures 8 to Figure 26 ............................................. 13 Added Figure 25 Renumbered Sequentially .............................. 13 Added Figure 11 ............................................................................. 13 Changes to Digital Inputs Section ................................................ 15 Added Figure 27 to Figure 35 ....................................................... 21 Changes to Figure 31 and Figure 32............................................. 16 Updated Outline Dimensions ....................................................... 26 Updated Outline Dimensions ....................................................... 30 Changes to Ordering Guide .......................................................... 31 Rev. C Page 2 of 32

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