Dual 10-Bit TxDAC+ with 2 Interpolation Filters AD9761 FEATURES FUNCTIONAL BLOCK DIAGRAM Complete 10-Bit, 40 MSPS Dual Transmit DAC CLOCK DCOM DVDD ACOM AVDD Excellent Gain and Offset Matching Differential Nonlinearity Error: 0.5 LSB IOUTA I LATCH Effective Number of Bits: 9.5 2 I DAC IOUTB SLEEP Signal-to-Noise and Distortion Ratio: 59 dB REFLO Spurious-Free Dynamic Range: 71 dB FSADJ REFERENCE REFIO DAC DATA 2 Interpolation Filters INPUTS COMP1 20 MSPS/Channel Data Rate (10 BITS) BIAS COMP2 GENERATOR Single Supply: 3 V to 5.5 V COMP3 Low Power Dissipation: 93 mW (3 V Supply QOUTA LATCH Q 2 Q DAC 40 MSPS) QOUTB On-Chip Reference WRITE INPUT MUX AD9761 28-Lead SSOP CONTROL SELECT INPUT PRODUCT DESCRIPTION The AD9761 is a complete dual-channel, high speed, 10-bit CMOS DAC. The AD9761 has been developed specifically for PRODUCT HIGHLIGHTS use in wide bandwidth communication applications (e.g., spread 1. Dual 10-Bit, 40 MSPS DACs spectrum) where digital I and Q information is being processed A pair of high performance 40 MSPS DACs optimized for low during transmit operations. It integrates two 10-bit, 40 MSPS distortion performance provide for flexible transmission of I DACs, dual 2 interpolation filters, a voltage reference, and digi - and Q information. tal input interface circuitry. The AD9761 supports a 20 MSPS 2. 2 Digital Interpolation Filters per channel input data rate that is then interpolated by 2 up to Dual matching FIR interpolation filters with 62.5 dB stop- 40 MSPS before simultaneously updating each DAC. band rejection precede each DAC input, thus reducing the The interleaved I and Q input data stream is presented to the DACs reconstruction filter requirements. digital interface circuitry, which consists of I and Q latches as 3. Low Power well as some additional control logic. The data is de-interleaved Complete CMOS dual DAC function operates on a low back into its original I and Q data. An on-chip state machine 200 mW on a single supply from 3 V to 5.5 V. The DAC ensures the proper pairing of I and Q data. The data output from full-scale current can be reduced for lower power opera- each latch is then processed by a 2 digital interpolation filter tion, and a sleep mode is provided for power reduction that eases the reconstruction filter requirements. The interpo - during idle periods. lated output of each filter serves as the input of their respective 10-bit DAC. 4. On-Chip Voltage Reference The AD9761 includes a 1.20 V temperature-compensated The DACs utilize a segmented current source architecture com- band gap voltage reference. bined with a proprietary switching technique to reduce glitch energy and to maximize dynamic accuracy. Each DAC provides 5. Single 10-Bit Digital Input Bus differential current output, thus supporting single-ended or dif- The AD9761 features a flexible digital interface that allows ferential applications. Both DACs are simultaneously updated each DAC to be addressed in a variety of ways including dif- and provide a nominal full-scale current of 10 mA. Also, the ferent update rates. full-scale currents between each DAC are matched to within 6. Small Package 0.07 dB (i.e., 0.75%), thus eliminating the need for additional The AD9761 offers the complete integrated function in a gain calibration circuitry. compact 28-lead SSOP package. The AD9761 is manufactured on an advanced low cost CMOS 7. Product Family process. It operates from a single supply of 3 V to 5.5 V and The AD9761 Dual Transmit DAC has a pair of Dual Receive consumes 200 mW of power. To make the AD9761 complete, it ADC companion products, the AD9281 (8 bits) and AD9201 also offers an internal 1.20 V temperature-compensated band gap (10 bits). reference. REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. that may result from its use. No license is granted by implication or oth- Tel: 781/329-4700 www.analog.com erwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. Fax: 781/326-8703 2003 Analog Devices, Inc. All rights reserved.AD9761* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS REFERENCE MATERIALS View a parametric search of comparable parts. Informational Advantiv Advanced TV Solutions EVALUATION KITS Solutions Bulletins & Brochures AD9761 Evaluation Board Digital to Analog Converters ICs Solutions Bulletin DOCUMENTATION DESIGN RESOURCES Application Notes AD9761 Material Declaration AN-237: Choosing DACs for Direct Digital Synthesis PCN-PDN Information AN-302: Exploit Digital Advantages in an SSB Receiver Quality And Reliability AN-320A: CMOS Multiplying DACs and Op Amps Combine Symbols and Footprints to Build Programmable Gain Amplifier, Part 1 AN-595: Understanding Pin Compatibility in the TxDAC DISCUSSIONS Line of High Speed D/A Converters View all AD9761 EngineerZone Discussions. AN-912: Driving a Center-Tapped Transformer with a Balanced Current-Output DAC SAMPLE AND BUY Data Sheet Visit the product page to see pricing options. AD9761: Dual 10-Bit TxDAC+ with 2 x Interpolation Filters Data Sheet TECHNICAL SUPPORT Submit a technical question or find your regional support TOOLS AND SIMULATIONS number. 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