14-Bit, 125 MSPS a TxDAC D/A Converter AD9764 FUNCTIONAL BLOCK DIAGRAM FEATURES Member of Pin-Compatible TxDAC Product Family +5V 125 MSPS Update Rate 0.1mF 14-Bit Resolution Excellent SFDR and IMD REFLO COMP1 AVDD ACOM Differential Current Outputs: 2 mA to 20 mA +1.20V REF AD9764 50pF 0.1mF Power Dissipation: 190 mW 5 V to 45 mW 3 V REFIO 0.1mF CURRENT COMP2 Power-Down Mode: 25 mW 5 V FS ADJ SOURCE ARRAY On-Chip 1.20 V Reference R SET Single +5 V or +3 V Supply Operation +5V DVDD I OUTA Packages: 28-Lead SOIC and TSSOP SEGMENTED LSB I DCOM OUTB SWITCHES SWITCHES Edge-Triggered Latches CLOCK CLOCK LATCHES APPLICATIONS SLEEP Communication Transmit Channel: DIGITAL DATA INPUTS (DB13DB0) Basestations ADSL/HFC Modems Differential current outputs are provided to support single- Instrumentation ended or differential applications. Matching between the two current outputs ensures enhanced dynamic performance in a PRODUCT DESCRIPTION differential output configuration. The current outputs may be The AD9764 is the 14-bit resolution member of the TxDAC tied directly to an output resistor to provide two complemen- series of high performance, low power CMOS digital-to-analog tary, single-ended voltage outputs or fed directly into a trans- converters (DACs). The TxDAC family, which consists of pin former. The output voltage compliance range is 1.25 V. compatible 8-, 10-, 12-, and 14-bit DACs, is specifically opti- mized for the transmit signal path of communication systems. The on-chip reference and control amplifier are configured for All of the devices share the same interface options, small outline maximum accuracy and flexibility. The AD9764 can be driven package and pinout, providing an upward or downward compo- by the on-chip reference or by a variety of external reference nent selection path based on performance, resolution and cost. voltages. The internal control amplifier, which provides a wide The AD9764 offers exceptional ac and dc performance while (>10:1) adjustment span, allows the AD9764 full-scale current supporting update rates up to 125 MSPS. to be adjusted over a 2 mA to 20 mA range while maintaining excellent dynamic performance. Thus, the AD9764 may operate The AD9764s flexible single-supply operating range of 2.7 V to at reduced power levels or be adjusted over a 20 dB range to 5.5 V and low power dissipation are well suited for portable and provide additional gain ranging capabilities. low power applications. Its power dissipation can be further reduced to a mere 45 mW with a slight degradation in performance The AD9764 is available in 28-lead SOIC and TSSOP packages. by lowering the full-scale current output. Also, a power-down It is specified for operation over the industrial temperature range. mode reduces the standby power dissipation to approximately PRODUCT HIGHLIGHTS 25 mW. 1. The AD9764 is a member of the TxDAC product family that The AD9764 is manufactured on an advanced CMOS process. provides an upward or downward component selection path A segmented current source architecture is combined with a based on resolution (8 to 14 bits), performance and cost. proprietary switching technique to reduce spurious components 2. Manufactured on a CMOS process, the AD9764 uses a pro- and enhance dynamic performance. Edge-triggered input prietary switching technique that enhances dynamic perfor- latches and a 1.2 V temperature compensated bandgap refer- mance beyond that previously attainable by higher power/cost ence have been integrated to provide a complete monolithic bipolar or BiCMOS devices. DAC solution. Flexible supply options support +3 V and +5 V 3. On-chip, edge-triggered input CMOS latches readily interface CMOS logic families. to +3 V and +5 V CMOS logic families. The AD9764 can The AD9764 is a current-output DAC with a nominal full-scale support update rates up to 125 MSPS. output current of 20 mA and > 100 kW output impedance. 4. A flexible single-supply operating range of 2.7 V to 5.5 V, and TxDAC is a registered trademark of Analog Devices, Inc. a wide full-scale current adjustment span of 2 mA to 20 mA, allows the AD9764 to operate at reduced power levels. 5. The current output(s) of the AD9764 can be easily config- REV. C ured for various single-ended or differential circuit topologies. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or Tel:781/329-4700 World Wide Web Site: AD9764SPECIFICATIONS DC SPECIFICATIONS (T to T , AVDD = +5 V, DVDD = +5 V, I = 20 mA, unless otherwise noted) MIN MAX OUTFS Parameter Min Typ Max Units RESOLUTION 14 Bits 1 DC ACCURACY Integral Linearity Error (INL) = +25 C 4.5 2.5 +4.5 LSB T A to T 6.5 +6.5 LSB T MIN MAX Differential Nonlinearity (DNL) = +25 C 2.5 1.5 +2.5 LSB T A T to T 4.5 +4.5 LSB MIN MAX ANALOG OUTPUT Offset Error 0.025 +0.025 % of FSR Gain Error (Without Internal Reference) 2 1 +2 % of FSR (With Internal Reference) 7 1 +7 % of FSR Gain Error 2 2.0 20.0 mA Full-Scale Output Current Output Compliance Range 1.0 1.25 V Output Resistance 100 kW Output Capacitance 5 pF REFERENCE OUTPUT Reference Voltage 1.08 1.20 1.32 V 3 Reference Output Current 100 nA REFERENCE INPUT Input Compliance Range 0.1 1.25 V Reference Input Resistance 1 MW 4 Small Signal Bandwidth (w/o C ) 1.4 MHz COMP1 TEMPERATURE COEFFICIENTS Offset Drift 0 ppm of FSR/ C Gain Drift (Without Internal Reference) 50 ppm of FSR/ C Gain Drift (With Internal Reference) 100 ppm of FSR/ C Reference Voltage Drift 50 ppm/ C POWER SUPPLY Supply Voltages 5 AVDD 2.7 5.0 5.5 V DVDD 2.7 5.0 5.5 V Analog Supply Current (I)2530mA AVDD 6 Digital Supply Current (I ) 1.5 4 mA DVDD Supply Current Sleep Mode (I ) 5.0 8.5 mA AVDD 6 Power Dissipation (5 V, I = 20 mA) 133 170 mW OUTFS 7 Power Dissipation (5 V, I = 20 mA) 190 mW OUTFS 7 Power Dissipation (3 V, I = 2 mA) 45 mW OUTFS 8 Power Supply Rejection Ratio AVDD 0.4 +0.4 % of FSR/V 8 Power Supply Rejection Ratio DVDD 0.025 +0.025 % of FSR/V OPERATING RANGE 40 +85 C NOTES 1 Measured at I , driving a virtual ground. OUTA 2 Nominal full-scale current, I , is 32 the I current. OUTFS REF 3 Use an external buffer amplifier to drive any external load. 4 Reference bandwidth is a function of external cap at COMP1 pin and signal level. 5 For operation below 3 V, it is recommended that the output current be reduced to 12 mA or less to maintain optimum performance. 6 Measured at f = 25 MSPS and f = 1.0 MHz. CLOCK OUT 7 Measured as unbuffered voltage output with I = 20 mA and 50 W R at I and I , f = 100 MSPS and f = 40 MHz. OUTFS LOAD OUTA OUTB CLOCK OUT 8 5% Power supply variation. Specifications subject to change without notice. 2 REV. C