16-Bit, 200 MSPS/500 MSPS TxDAC+ with 2/4/8 Interpolation and Signal Processing AD9786 FEATURES PRODUCT HIGHLIGHTS 16-bit resolution, 200 MSPS input data rate 1. 16-bit, high speed, interpolating TxDAC+. IMD 90 dBc 10 MHz 2. 2/4/8 user-selectable interpolating filter. The filter Noise spectral density (NSD): 164 dBm/Hz 10 MHz eases data rate and output signal reconstruction filter WCDMA ACLR = 80 dBc 40 MHz IF requirements. DNL = 0.3 LSB INL = 0.6 LSB 3. 200 MSPS input data rate. Selectable 2/4/8 interpolation filters Selectable fDAC/2, fDAC/4, fDAC/8 modulation modes 4. Ultra high speed, 500 MSPS DAC conversion rate. Single- or dual-channel signal processing 5. Flexible clock with single-ended or differential input. Selectable image rejection Hilbert transform CMOS, 1 V p-p sine wave, and LVPECL capability. Flexible calibration engine Direct IF transmission features 6. Complete CMOS DAC function. It operates from a 3.1 V Serial control interface to 3.5 V single analog (AVDD) supply, 2.5 V digital supply, Versatile clock and data interface and a 3.3 V digital (DRVDD) supply. The DAC full-scale 3.3 V-compatible digital interface current can be reduced for lower power operation, and On-chip 1.2 V reference a sleep mode is provided for low power idle periods. 80-lead, thermally enhanced, TQFP EP package 7. On-chip voltage reference. The AD9786 includes a 1.20 V temperature-compensated band gap voltage APPLICATIONS reference. Base stations: multicarrier WCDMA, GSM/EDGE, TD-SCDMA, IS136, TETRA 8. Multichip synchronization. Multiple AD9786 DACs can Instrumentation be synchronized to a single master AD9786 to ease timing RF signal generators, arbitrary waveform generators design requirements and optimize image reject transmit HDTV transmitters performance. Broadband wireless systems Digital radio links Satellite systems FUNCTIONAL BLOCK DIAGRAM LATCH 2 2 2 FSADJ I REFIO 0 t 90 P1B 15:0 f /2 ZERO IOUTA DAC 16-BIT DAC 0 STUFF f /4 IOUTB DAC 90 P2B 15:0 f /8 DAC SDIO 0 HILBERT SDO 90 CSB Q SCLK 1 RESET DATACLK LATCH 2 2 2 CLK+ CLOCK DISTRIBUTION AND CONTROL CLK Figure 1. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. DATA PORT DATA SYNCHRONIZER ASSEMBLER Re()/Im() CALIBRATION REFERENCE SPI CIRCUITS 03152-001AD9786 TABLE OF CONTENTS Features .............................................................................................. 1 General Operation of the Serial Interface............................... 20 Applications....................................................................................... 1 Serial Interface Port Pin Descriptions ..................................... 20 Product Highlights ........................................................................... 1 MSB/LSB Transfers .................................................................... 21 Functional Block Diagram .............................................................. 1 Notes on Serial Port Operation ................................................ 21 Revision History ............................................................................... 3 Mode Control (via Serial Port)..................................................... 22 General Description ......................................................................... 4 Digital Filter Specifications ........................................................... 26 Specifications..................................................................................... 5 Digital Interpolation Filter Coefficients.................................. 26 DC Specifications ......................................................................... 5 Clock/Data Timing .................................................................... 27 Dynamic Specifications ............................................................... 6 Real and Complex Signals......................................................... 32 Digital Specifications ................................................................... 7 Modulation Modes..................................................................... 33 Absolute Maximum Ratings............................................................ 8 Power Dissipation....................................................................... 38 Thermal Resistance ...................................................................... 8 Hilbert Transform Implementation......................................... 40 ESD Caution.................................................................................. 8 Operating the AD9786 Rev. F Evaluation Board ....................... 44 Pin Configuration and Function Descriptions............................. 9 Power Supplies............................................................................ 44 Clock .............................................................................................. 9 PECL Clock Driver .................................................................... 44 Analog.......................................................................................... 10 Data Inputs.................................................................................. 45 Data .............................................................................................. 10 Serial Port .................................................................................... 45 Serial Interface ............................................................................ 11 Analog Output............................................................................ 45 Terminology .................................................................................... 12 Outline Dimensions ....................................................................... 55 Typical Performance Characteristics ........................................... 14 Ordering Guide .......................................................................... 55 Serial Control Interface.................................................................. 20 Rev. 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