Complete 20 MSPS a CCD Signal Processors AD9841A/AD9842A PRODUCT DESCRIPTION FEATURES The AD9841A and AD9842A are complete analog signal proces- 20 MSPS Correlated Double Sampler (CDS) sors for CCD applications. Both products feature a 20 MHz 4 dB 6 dB 6-Bit Pixel Gain Amplier (PxGA ) single-channel architecture designed to sample and condition 2 dB to 36 dB 10-Bit Variable Gain Amplier (VGA) the outputs of interlaced and progressive scan area CCD arrays. Low Noise Clamp Circuits The AD9841A/AD9842As signal chain consists of an input Analog Preblanking Function clamp, correlated double sampler (CDS), Pixel Gain Amplier 10-Bit (9841) or 12-Bit (9842) 20 MSPS A/D Converter (PxGA), digitally controlled variable gain amplier (VGA), Auxiliary Inputs with VGA and Input Clamp black level clamp, and A/D converter. The AD9841A offers 10-bit 3-Wire Serial Digital Interface ADC resolution, while the AD9842A contains a true 12-bit 3 V Single Supply Operation ADC. Additional input modes are provided for processing analog Low Power: 65 mW 2.7 V Supply video signals. 48-Lead LQFP Package The internal registers are programmed through a 3-wire serial APPLICATIONS digital interface. Programmable features include gain adjustment, Digital Still Cameras black level adjustment, input conguration, and power-down modes. Digital Video Camcorders The AD9841A and AD9842A operate from a single 3 V power supply, typically dissipate 78 mW, and are packaged in a 48- lead LQFP. FUNCTIONAL BLOCK DIAGRAM PBLK AVDD AVSS HD VD CLPOB COLOR DRVDD 4dB 6dB STEERING CLP DRVSS 2dB36dB CDS PxGA CCDIN 10/12 2:1 ADC DOUT VGA MUX CLP 6 VRT BANDGAP CLPDM REFERENCE VRB OFFSET 10 DAC AUX1IN 2:1 BUF INTERNAL MUX CML BIAS AUX2IN 8 CONTROL REGISTERS CLP DVDD DIGITAL INTERNAL DVSS INTERFACE TIMING AD9841A/AD9842A SHP SHD DATACLK SL SCK SDATA PxGA is a registered trademark of Analog Devices, Inc. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties Tel: 781/329-4700 World Wide Web Site: AD9841A/AD9842ASPECIFICATIONS (T to T , AVDD = DVDD = 3.0 V, f = 20 MHz, unless otherwise noted.) GENERAL SPECIFICATIONS MIN MAX DATACLK Parameter Min Typ Max Unit TEMPERATURE RANGE Operating 20 +85 C Storage 65 +150 C POWER SUPPLY VOLTAGE Analog, Digital, Digital Driver 2.7 3.6 V POWER CONSUMPTION Normal Operation (Specied Under Each Mode of Operation) Power-Down Modes Fast Recovery Mode 30 mW Standby 5 mW Total Power-Down 1 mW MAXIMUM CLOCK RATE 20 MHz A/D CONVERTER (AD9841A) Resolution 10 Bits Differential Nonlinearity (DNL) 0.4 1.0 LSB No Missing Codes 10 Bits Guaranteed Full-Scale Input Voltage 2.0 V Data Output Coding Straight Binary A/D CONVERTER (AD9842A) Resolution 12 Bits Differential Nonlinearity (DNL) 0.5 1.0 LSB No Missing Codes 12 Bits Guaranteed Full-Scale Input Voltage 2.0 V Data Output Coding Straight Binary VOLTAGE REFERENCE Reference Top Voltage (VRT) 2.0 V Reference Bottom Voltage (VRB) 1.0 V Specications subject to change without notice. (DRVDD = 2.7 V, C = 20 pF unless otherwise noted.) DIGITAL SPECIFICATIONS L Parameter Symbol Min Typ Max Unit LOGIC INPUTS High Level Input Voltage V 2.1 V IH Low Level Input Voltage V 0.6 V IL High Level Input Current I 10 A IH Low Level Input Current I 10 A IL Input Capacitance C 10 pF IN LOGIC OUTPUTS High Level Output Voltage, I = 2 mA V 2.2 V OH OH Low Level Output Voltage, I = 2 mA V 0.5 V OL OL Specications subject to change without notice. 2 REV. 0 OBSOLETE