Mixed-Signal Front-End (MxFE ) Processor a for Broadband Communications * AD9860/AD9862 FEATURES FUNCTIONAL BLOCK DIAGRAM Mixed-Signal Front-End Processor with Dual Converter Receive and Dual Converter Transmit Signal Paths VIN+A 1x PGA ADC RxA DATA Receive Signal Path Includes: VINA 0:11 BYPASSABLE LOW-PASS HILBERT Two 10-/12-Bit, 64 MSPS Sampling A/D Converters DECIMATION FILTER FILTER with Internal or External Independent References, VIN+B 1x PGA ADC VINB Input Buffers, Programmable Gain Amplifiers, RxB DATA 0:11 Low-Pass Decimation Filters, and a Digital Hilbert Filter LOGIC LOW SIGDELT - Transmit Signal Path Includes: AD9860/AD9862 Two 12-/14-Bit, 128 MSPS D/A Converters with SPI SPI REGISTERS AUX DAC A AUX DAC INTERFACE Programmable Full-Scale Output Current, Channel AUX DAC B Independent Fine Gain and Offset Control, Digital AUX DAC Hilbert and Interpolation Filters, and Digitally Tunable AUX DAC C Rx PATH AUX DAC CLOCK TIMING OSC1 DLL Real or Complex Up-Converters DISTRIBUTION 1 , 2 , 4 OSC2 Tx PATH BLOCK Delay-Locked Loop Clock Multiplier and Integrated AUX ADC A1 TIMING AUX ADC AUX ADC A2 Timing Generation Circuitry Allow for Single Crystal AUX ADC B1 or Clock Operation CLKOUT1 AUX ADC AUX ADC B2 Programmable Output Clocks, Serial Programmable CLKOUT2 BYPASSABLE BYPASSABLE Interface, Programmable Sigma-Delta, Three Auxiliary DIGITAL DIGITAL QUADRATURE QUADRATURE DAC Outputs and Two Auxiliary ADCs with Dual MIXER MIXER IOUT+A Multiplexed Inputs PGA DAC IOUTA Tx DATA HILBERT 0:13 FILTER IOUT+B APPLICATIONS PGA DAC IOUTB Broadband Wireless Systems BYPASSABLE FS/4 Fixed Wireless, WLAN, MMDS, LMDS LOW-PASS NCO FS/8 INTERPOLATION Broadband Wireline Systems FILTER Cable Modems, VDSL, PowerPlug Digital Communications Set-Top Boxes, Data Modems range for both channels. The output data bus can be multi- plexed to accommodate a variety of interface types. GENERAL DESCRIPTION The AD9860/AD9862 transmit path (Tx) consists of two chan- The AD9860 and AD9862 (AD9860/AD9862) are versatile nels that contain high performance, 12-/14-bit, 128 MSPS integrated mixed-signal front-ends (MxFE) that are optimized digital-to-analog converters (DAC), programmable gain amplifiers for broadband communication markets. The AD9860/AD9862 (TxPGA), interpolation filters, a Hilbert filter, and digital mixers are cost effective, mixed signal solutions for wireless or wireline for complex or real signal frequency modulation. The Tx latch standards based or proprietary broadband modem systems where and demultiplexer circuitry can process real or I/Q data. Interpo- dynamic performance, power dissipation, cost, and size are all lation rates of 2 and 4 are available to ease requirements on critical attributes. The AD9860 has 10-bit ADCs and 12-bit DACs an external reconstruction filter. For single channel systems, the the AD9862 has 12-bit ADCs and 14-bit DACs. digital Hilbert filter can be used with an external quadrature modulator to create an image rejection architecture. The two The AD9860/AD9862 receive path (Rx) consists of two channels 12-/14-bit, high performance DACs produce an output signal that each include a high performance, 10-/12-bit, 64 MSPS analog- that can be scaled over a 20 dB range by the TxPGA. to-digital converter (ADC), input buffer, Programmable Gain Amplifier (RxPGA), digital Hilbert filter, and decimation filter. The A programmable delay-locked loop (DLL) clock multiplier and Rx can be used to receive real, diversity, or I/Q data at baseband or integrated timing circuits enable the use of a single external low IF. The input buffers provide a constant input impedance for reference clock or an external crystal to generate clocking for all both channels to ease impedance matching with external com- internal blocks and also provides two external clock outputs. ponents (e.g., SAW filter). The RxPGA provides a 20 dB gain Additional features include a programmable sigma-delta output, four auxiliary ADC inputs and three auxiliary DAC outputs. *Protected by U.S.Patent No. Device programmability is facilitated by a serial port interface MxFE is a trademark of Analog Devices, Inc. (SPI) combined with a register bank. The AD9860/AD9862 is available in a space saving 128-lead LQFP. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties that Tel: 781/329-4700 www.analog.com may result from its use. No license is granted by implication or otherwise Fax: 781/326-8703 Analog Devices, Inc., 2002 under any patent or patent rights of Analog Devices.(V = 3.3 V 5%, V = 3.3 V 10%, f = 128 MHz, f = 64 MHz A D DAC ADC Normal Timing Mode, 2 DLL Setting, R = 4 k , 50 DAC Load, AD9860/AD9862SPECIFICATIONS SET RxPGA = +6 dB Gain, TxPGA = +20 dB Gain.) Test AD9860/AD9862 Tx PARAMETERS Temp Level Min Typ Max Unit 12-/14-BIT DAC CHARACTERISTICS Resolution NA NA 12/14 Bits Maximum Update Rate 128 MSPS Full-Scale Output Current Full I 2 20 mA Gain Error (Using Internal Reference) 25CI 5.5 +0.5 +5.5 %FS Offset Error 25CI 1 0.0 +1 %FS Reference Voltage (REFIO Level) 25CI 1.15 1.22 1.28 V Negative Differential Nonlinearity (DNL) 25C III 0.5/0.5 LSB Positive Differential Nonlinearity (+DNL) 25C III 1/2 LSB Integral Nonlinearity (INL) 25C III 1/3 LSB Output Capacitance 25C III 5 pF Phase Noise 1 kHz Offset, 6 MHz Tone Crystal and OSC IN Multiplier Enabled at 4 25C III 115 dBc/Hz Output Voltage Compliance Range Full II 0.5 +1.5 V TRANSMIT TxPGA CHARACTERISTICS Gain Range 25C III 20 dB Step Size Accuracy 25C III 0.1 dB Step Size 25C III 0.08 dB Tx DIGITAL FILTER CHARACTERISTICS 1 Hilbert Filter Pass Band (<0.1 dB Ripple) Full II 12.5 38 % f DATA 2 2 /4 Interpolator Stop Band Full II 38 % f DATA DYNAMIC PERFORMANCE (A = 20 mA FS, f = 1 MHz) OUT Differential Phase 25C III <0.1 Degree Differential Gain 25C III <1 LSB AD9860 Signal-to-Noise Ratio (SNR) Full I 68.2 70.7 dB AD9860 Signal-to-Noise and Distortion Ratio Full I 62.5 66.1 dB AD9860 Total Harmonic Distortion (THD) Full I 74.5 64.0 dB AD9860 Wideband SFDR (to Nyquist) 1 MHz Analog Out, I = 2 mA 25C III 70.6 dBc OUT 1 MHz Analog Out, I = 20 mA 25CI 64.4 75 dBc OUT 6 MHz Analog Out, I = 20 mA 25C III 75 dBc OUT AD9860 Narrowband SFDR (1 MHz Window) 1 MHz Analog Out, I = 2 mA 25C III 70.2 dBc OUT 1 MHz Analog Out, I = 20 mA 25CI 83 90 dBc OUT AD9862 Signal-to-Noise Ratio (SNR) Full I 68.9 72.0 dB AD9862 Signal-to-Noise and Distortion Ratio Full I 64.75 69.8 dB AD9862 Total Harmonic Distortion (THD) Full I 75.5 65.0 dB AD9862 Wideband SFDR (to Nyquist) 1 MHz Analog Out, I = 2 mA 25C III 70.6 dBc OUT 1 MHz Analog Out, I = 20 mA 25CI 64.9 76.0 dBc OUT 6 MHz Analog Out, I = 20 mA 25C III 76.0 dBc OUT AD9862 Narrowband SFDR (1 MHz Window) 1 MHz Analog Out, I = 2 mA 25C III 70.2 dBc OUT 1 MHz Analog Out, I = 20 mA 25CI 83 90 dBc OUT Rx PARAMETERS RECEIVE BUFFER Input Resistance (Differential) Full III 200 W Input Capacitance (Each Input) Full III 5 pF Maximum Input Bandwidth (3 dB) Full III 140 MHz Analog Input Range (Best Noise Performance) Full II 2 V p-p Diff Analog Input Range (Best THD Performance) Full II 1 V p-p Diff RECEIVE PGA CHARACTERISTICS Gain Error 25CI 0.3 dB Gain Range 25CI 19 20 21 dB Step Size Accuracy 25CI 0.2 dB Step Size 25CI 1 dB Input Bandwidth (3 dB, Rx Buffer Bypassed) 25C III 250 MHz 10-/12-BIT ADC CHARACTERISTICS Resolution NA NA 10/12 Bits Maximum Conversion Rate Full I 64 MHz 2 REV. 0