Analog/HDMI Dual Display Interface AD9880 FEATURES FUNCTIONAL BLOCK DIAGRAM Analog/HDMI dual interface ANALOG INTERFACE Supports high bandwidth digital content protection R/G/B OR YPbPr R/G/B 8X3 IN0 2:1 RGB-to-YCbCr 2-way color conversion CLAMP A/D MUX R/G/B OR YPbPr or YCbCr IN1 Automated clamping level adjustment HSYNC 0 2:1 HSYNC 1 MUX 1.8 V/3.3 V power supply 2 DATACK HSYNC 0 2:1 HSOUT SYNC MUX 100-lead LQFP Pb-free package HSYNC 1 PROCESSING VSOUT 2:1 SOGIN 0 AND SOGOUT RGB and YCbCr output formats SOGIN 1 MUX CLOCK GENERATION COAST Analog interface REFOUT FILT REF REFIN R/G/B 8X3 CKINV 8-bit triple ADC CKEXT YCbCr (4:2:2 OR 4:4:4) 100 MSPS maximum conversion rate 2 SCL Macrovision detection DATACK SERIAL REGISTER SDA 2:1 input mux AND HSOUT POWER MANAGEMENT VSOUT Full sync processing SOGOUT Sync detect for hot plugging DIGITAL INTERFACE DE Midscale clamping R/G/B 8X3 OR YCbCr RX0+ Digital video interface RX0 2 DATACK HDMI v 1.1, DVI v 1.0 RX1+ DE H RX1 SYNC 150 MHz HDMI receiver RX2+ V HDMI RECEIVER SYNC Supports high bandwidth digital content protection RX2 SPDIF OUT RXC+ (HDCP 1.1) 4 RXC 8-CHANNEL I SOUT Digital audio interface R 2 TERM SCLK HDMI 1.1-compatible audio interface MCLK MCL LRCLK S/PDIF (IEC90658-compatible) digital audio output MDA HDCP DDCSCL Multichannel I2S audio output (up to 8 channels) DDCSDA AD9880 Figure 1. APPLICATIONS Advanced TV CMOS outputs can be powered from 1.8 V to 3.3 V. The HDTV AD9880s on-chip PLL generates a pixel clock from Hsync. Pixel Projectors clock output frequencies range from 12 MHz to 150 MHz. PLL LCD monitor clock jitter is typically less than 700 ps p-p at 150 MHz. The AD9880 also offers full sync processing for composite sync and GENERAL DESCRIPTION sync-on-green (SOG) applications. The AD9880 offers designers the flexibility of an analog interface Digital Interface and high definition multimedia interface (HDMI) receiver inte- The AD9880 contains a HDMI 1.1-compatible receiver and sup- grated on a single chip. Also included is support for high band- ports all HDTV formats (up to 1080 p and 720 p) and display width digital content protection (HDCP). resolutions up to SXGA (1280 1024 75 Hz). The receiver Analog Interface features an intrapair skew tolerance of up to one full clock cycle. The AD9880 is a complete 8-bit 150 MSPS monolithic analog inter- With the inclusion of HDCP, displays can now receive encrypted face optimized for capturing component video (YPbPr) and RGB video content. The AD9880 allows for authentication of a video graphics signals. Its 150 MSPS encode rate capability and full power receiver, decryption of encoded data at the receiver, and renewa- analog bandwidth of 330 MHz supports all HDTV formats (up to bility of the authentication during transmission, as specified by the 1080 p) and FPD resolutions up to SXGA (1280 1024 75 Hz). HDCP v 1.1 protocol. The analog interface includes a 150 MHz triple ADC with internal Fabricated in an advanced CMOS process, the AD9880 is provided 1.25 V reference, a phase-locked loop (PLL), and programmable in a space-saving, 100-lead LQFP surface-mount Pb-free plastic gain, offset, and clamp control. The user provides only 1.8 V and package and is specified over the 0C to 70C temperature range. 3.3 V power supplies, analog input, and Hsync. Three-state Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Specifications subject to change without notice. No license is granted by implication Tel: 781.329.4700 www.analog.com or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 2005 Analog Devices, Inc. All rights reserved. MUXES RGB YCbCr MATRIX 05087-001AD9880 TABLE OF CONTENTS Specifications..................................................................................... 3 Timing Diagrams ....................................................................... 21 Analog Interface Electrical Characteristics............................... 3 2-Wire Serial Register Map ........................................................... 23 Digital Interface Electrical Characteristics ............................... 4 2-Wire Serial Control Register Detail.......................................... 37 Absolute Maximum Ratings............................................................ 6 Chip Identification..................................................................... 37 Explanation of Test Levels........................................................... 6 PLL Divider Control .................................................................. 37 ESD Caution.................................................................................. 6 Clock Generator Control .......................................................... 37 Pin Configuration and Function Descriptions............................. 7 Input Gain ................................................................................... 38 Design Guide................................................................................... 12 Input Offset ................................................................................. 38 General Description................................................................... 12 Sync .............................................................................................. 39 Digital Inputs .............................................................................. 12 Coast and Clamp Controls........................................................ 39 Analog Input Signal Handling.................................................. 12 Status of Detected Signals ......................................................... 40 Hsync and Vsync Inputs............................................................ 12 Polarity Status ............................................................................. 41 Serial Control Port ..................................................................... 12 BT656 Generation ...................................................................... 46 Output Signal Handling............................................................. 12 Macrovision................................................................................. 48 Clamping ..................................................................................... 12 Color Space Conversion ............................................................ 49 Timing.......................................................................................... 16 2-Wire Serial Control Port........................................................ 56 HDMI Receiver........................................................................... 20 PCB Layout Recommendations.................................................... 58 DE Generator .............................................................................. 20 Color Space Converter (CSC) Common Settings...................... 60 4:4:4 to 4:2:2 Filter ...................................................................... 20 Outline Dimensions ....................................................................... 62 Audio PLL Setup......................................................................... 21 Ordering Guide .......................................................................... 62 Audio Board Level Muting........................................................ 21 REVISION HISTORY 8/05Revision 0: Initial Version Rev. 0 Page 2 of 64