AD9912A/PCBZ Analog Devices

1 GSPS Direct Digital Synthesizer with 14-Bit DAC AD9912 FEATURES APPLICATIONS 1 GSPS internal clock speed (up to 400 MHz output directly) Agile LO frequency synthesis Integrated 1 GSPS 14-bit DAC Low jitter, fine tune clock generation 48-bit frequency tuning word with 4 Hz resolution Test and measurement equipment Differential HSTL comparator Wireless base stations and controllers Flexible system clock input accepts either crystal or external Secure communications reference clock Fast frequency hopping On-chip low noise PLL REFCLK multiplier 2 SpurKiller channels GENERAL DESCRIPTION Low jitter clock doubler for frequencies up to 750 MHz The AD9912 is a direct digital synthesizer (DDS) that features Single-ended CMOS comparator frequencies of <150 MHz an integrated 14-bit digital-to-analog converter (DAC). The Programmable output divider for CMOS output AD9912 features a 48-bit frequency tuning word (FTW) that Serial I/O control can synthesize frequencies in step sizes no larger than 4 Hz. Excellent dynamic performance Absolute frequency accuracy can be achieved by adjusting the Software controlled power-down DAC system clock. Available in two 64-lead LFCSP packages The AD9912 also features an integrated system clock phase- Residual phase noise 250 MHz locked loop (PLL) that allows for system clock inputs as low 10 Hz offset: 113 dBc/Hz as 25 MHz. 1 kHz offset: 133 dBc/Hz 100 kHz offset: 153 dBc/Hz The AD9912 operates over an industrial temperature range, 40 MHz offset: 161 dBc/Hz spanning 40C to +85C. BASIC BLOCK DIAGRAM AD9912 DAC OUT STARTUP S1 TO S4 CONFIGURATION LOGIC FILTER DIRECT FDBK IN DIGITAL SYNTHESIS CORE OUT CLOCK DIGITAL SERIAL PORT, OUTPUT INTERFACE I/O LOGIC DRIVERS OUT CMOS SYSTEM CLOCK MULTIPLIER Figure 1. Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20072010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 06763-001AD9912* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS DOCUMENTATION View a parametric search of comparable parts. Application Notes AN-1389: Recommended Rework Procedure for the Lead Frame Chip Scale Package (LFCSP) EVALUATION KITS AN-1396: How to Predict the Frequency and Magnitude of AD9912 Evaluation Board the Primary Phase Truncation Spur in the Output Spectrum of a Direct Digital Synthesizer (DDS) AN-237: Choosing DACs for Direct Digital Synthesis AN-280: Mixed Signal Circuit Technologies AN-342: Analog Signal-Handling for High Speed and Accuracy AN-345: Grounding for Low-and-High-Frequency Circuits AN-419: A Discrete, Low Phase Noise, 125 MHz Crystal Oscillator for the AD9850 AN-423: Amplitude Modulation of the AD9850 Direct Digital Synthesizer AN-543: High Quality, All-Digital RF Frequency Modulation Generation with the ADSP-2181 and the AD9850 DDS AN-557: An Experimenter s Project: AN-587: Synchronizing Multiple AD9850/AD9851 DDS- Based Synthesizers AN-605: Synchronizing Multiple AD9852 DDS-Based Synthesizers AN-621: Programming the AD9832/AD9835 AN-632: Provisionary Data Rates Using the AD9951 DDS as an Agile Reference Clock for the ADN2812 Continuous- Rate CDR AN-769: Generating Multiple Clock Outputs from the AD9540 AN-772: A Design and Manufacturing Guide for the Lead Frame Chip Scale Package (LFCSP) AN-823: Direct Digital Synthesizers in Clocking Applications Time AN-837: DDS-Based Clock Jitter Performance vs. DAC Reconstruction Filter Performance AN-843: Measuring a Loudspeaker Impedance Profile Using the AD5933 AN-847: Measuring a Grounded Impedance Profile Using the AD5933 AN-851: A WiMax Double Downconversion IF Sampling Receiver Design