Dual-Channel, 14-Bit, CCD Signal Processor with Precision Timing Core AD9974 FEATURES GENERAL DESCRIPTION 1.8 V analog and digital core supply voltage The AD9974 is a highly integrated, dual-channel, charge- Correlated double sampler (CDS) with coupled device (CCD) signal processor for high speed digital 3 dB, 0 dB, +3 dB, and +6 dB gain video camera applications. Each channel is specified at pixel 6 dB to 42 dB, 10-bit variable gain amplifier (VGA) rates of up to 65 MHz. The AD9974 consists of a complete 14-bit, 65 MHz analog-to-digital converter (ADC) analog front end (AFE) with analog-to-digital conversion, Black level clamp with variable level control combined with a programmable timing driver. The Precision Complete on-chip timing generator Timing core allows adjustment of high speed clocks with Precision Timing core with 240 ps resolution 65 MHz approximately 240 ps resolution at 65 MHz operation. On-chip 3 V horizontal and RG drivers Each AFE includes black level clamping, CDS, VGA, and 100-lead, 9 mm 9 mm, 0.8 mm pitch, CSP BGA package a 65 MSPS, 14-bit ADC. The timing driver provides the high Internal low dropout (LDO) regulator circuitry speed CCD clock drivers for the RG A, RG B, H1 A to H4 A, and H1 B to H4 B outputs. A 3-wire serial interface is used to APPLICATIONS program each channel of the AD9974. Professional HDTV camcorders Professional/high end digital cameras Available in a space-saving, 9 mm 9 mm, CSP BGA package, Broadcast cameras the AD9974 is specified over an operating temperature range of Industrial high speed cameras 25C to +85C. FUNCTIONAL BLOCK DIAGRAM REFT A REFB A REFT B REFB B AD9974 VREF A VREF B CCDINP A 14 DOUT A CDS VGA ADC CCDINM A 3, 0, +3, +6dB 6dB TO 42dB CLAMP CLAMP 6dB TO 42dB 3, 0, +3, +6dB 14 CCDINP B DOUT B CDS VGA ADC CCDINM B 1.8V OUTPUT LDO A INTERNAL CLOCKS 1.8V OUTPUT LDO B RG A PRECISION CLI A RG B TIMING CORE CLI B 4 HORIZONTAL H1 A TO H4 A DRIVERS SCK A 4 SYNC INTERNAL H1 B TO H4 B GENERATOR REGISTERS SCK B HD A VD A HD B VD B SL A SDATA A SL B SDATA B Figure 1. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 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Trademarks and registered trademarks are the property of their respective owners. 05955-001AD9974 TABLE OF CONTENTS Features .............................................................................................. 1 Precision Timing High Speed Timing Core ............................. 15 Applications ....................................................................................... 1 Horizontal Clamping and Blanking ......................................... 18 General Description ......................................................................... 1 Complete FieldCombining H-Patterns ............................... 25 Functional Block Diagram .............................................................. 1 Mode Registers ........................................................................... 26 Revision History ............................................................................... 2 Horizontal Timing Sequence Example .................................... 28 Specif icat ions ..................................................................................... 3 Analog Front End Description and Operation ...................... 29 Channel-to-Channel Specifications ........................................... 3 Applications Information .............................................................. 33 Timing Specifications .................................................................. 4 Recommended Power-Up Sequence ....................................... 33 Digital Specifications ................................................................... 5 Standby Mode Operation .......................................................... 36 Analog Specifications ................................................................... 6 CLI Frequency Change .............................................................. 36 Absolute Maximum Ratings ............................................................ 8 Circuit Configuration ................................................................ 37 Thermal Characteristics .............................................................. 8 Grounding and Decoupling Recommendations .................... 37 ESD Caution .................................................................................. 8 3-Wire Serial Interface Timing ..................................................... 39 Pin Configuration and Function Descriptions ............................. 9 Layout of Internal Registers ...................................................... 40 Typical Performance Characteristics ........................................... 11 Updating of Register Values ...................................................... 41 Equivalent Input/Output Circuits ................................................ 12 Complete Register Listing ............................................................. 42 Terminology .................................................................................... 13 Outline Dimensions ....................................................................... 50 Theory of Operation ...................................................................... 14 Ordering Guide .......................................................................... 50 Programmable Timing Generation .............................................. 15 REVISION HISTORY 10/09Revision A: Initial Version Changes to Table 1 ............................................................................ 3 Changes to Table 3 ............................................................................ 4 Changes to Pin Function Descriptions Table ............................... 9 Changes to Figure 11 ...................................................................... 12 Changes to Individual HBLK Pattern Section ............................ 20 Changes to Table 14 ........................................................................ 25 Added Example Register Setting for Power-Up Section ........... 34 Added Additional Restrictions Section ....................................... 35 Changes to Table 2 .......................................................................... 36 Changes to 3 V System Compatibility Section ........................... 37 Changes to Grounding and Decoupling Recommendations Section ............................................................ 37 Changes to Table 30 ........................................................................ 48 Changes to Table 31 ........................................................................ 49 Changes to Ordering Guide .......................................................... 50 Rev. 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