0.2 V/C Offset Drift, 105 MHz Low Power,
Low Noise, Rail-to-Rail Amplifiers
Data Sheet
ADA4805-1/ADA4805-2
FEATURES TYPICAL APPLICATIONS CIRCUIT
+7.5V
Low input offset voltage: 125 V (maximum)
5V REF
ADA4805-1/
ADA4805-2
Low input offset voltage drift ADR435
VDD
0.2 V/C (typical)
C2 C3 C4
10F 0.1F 100nF
1.5 V/C (maximum)
Ultralow supply current: 500 A per amplifier
+7.5V
Fully specified at V = 3 V, 5 V, 5 V
S
ADA4805-1/
0V TO
ADA4805-2
High speed performance
V REF VDD
REF
IN+
3 dB bandwidth: 105 MHz
R3
20 AD7980
Slew rate: 160 V/s
IN
GND
Settling time to 0.1%: 35 ns
C1
2.7nF
Rail-to-rail outputs
Input common-mode range: V 0.1 V to +V 1 V
S S
Figure 1. Driving the AD7980 with the ADA4805-1/ADA4805-2
Low noise: 5.9 nV/Hz at 100 kHz; 0.6 pA/Hz at 100 kHz
The Analog Devices, Inc., proprietary extra fast complementary
Low distortion: 102 dBc/126 dBc HD2/HD3 at 100 kHz
bipolar (XFCB) process allows both low voltage and low current
Low input bias current: 470 nA (typical)
noise (5.9 nV/Hz, 0.6 pA/Hz). The ADA4805-1/ADA4805-2
Dynamic power scaling
operate over a wide range of supply voltages from 1.5 V to
Turn-on time: 3 s (maximum) fully settled
5 V, as well as single 3 V and 5 V supplies, making them ideal
Small packaging
for high speed, low power instruments.
6-lead SC70, 6-lead SOT-23, and 8-lead MSOP
The ADA4805-1 is available in a 6-lead SOT-23 and a 6-lead
APPLICATIONS
SC70 package. The ADA4805-2 is available in an 8-lead MSOP
High resolution, high precision analog-to-digital converter
and a 10-lead LFCSP package. These amplifiers are rated to
(ADC) drivers
work over the industrial temperature range of 40C to +125C.
Battery-powered instrumentation
0
INPUT FREQUENCY = 10kHz
Micropower active filters
SNR = 89.4dB
20
THD = 104dB
Portable point of sales terminals
SINAD = 89.3dB
40
Active RFID readers
Photo multipliers
60
ADC reference buffers
80
GENERAL DESCRIPTION
100
The ADA4805-1/ADA4805-2 are high speed voltage feedback,
120
rail-to-rail output amplifiers with an exceptionally low
140
quiescent current of 500 A, making them ideal for low power,
high resolution data conversion systems. Despite being low 160
power, these amplifiers provide excellent overall performance.
180
0 10 20 30 40 50 60 70 80
They offer a high bandwidth of 105 MHz at a gain of +1, a high
FREQUENCY (kHz)
slew rate of 160 V/s, and a low input offset voltage of 125 V
Figure 2. FFT Plot for the Circuit Configuration in Figure 1
(maximum).
Table 1. Complementary ADCs to the ADA4805-1/ADA4805-2
A shutdown pin allows further reduction of the quiescent
Throughput Resolution SNR
supply current to 2.9 A. For power sensitive applications, the
Product ADC Power (mW) (MSPS) (Bits) (dB)
shutdown mode offers a very fast turn-on time of 3 s. This
AD7982 7.0 1 18 98
allows the user to dynamically manage the power of the
AD7984 10.5 1.33 18 98.5
amplifier by turning the amplifier off between ADC samples.
AD7980 4.0 1 16 91
AD7685 10 0.25 16 88
Rev. B Document Feedback
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AMPLITUDE (dB)
11345-010
11345-102ADA4805-1/ADA4805-2 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1 Amplifier Description ................................................................ 18
Applications ....................................................................................... 1 Input Protection ......................................................................... 18
General Description ......................................................................... 1 Shutdown Operation .................................................................. 18
Typical Applications Circuit ............................................................ 1 Noise Considerations ................................................................. 19
Revision History ............................................................................... 2 Applications Information .............................................................. 20
Specif icat ions ..................................................................................... 3 Slew Enhancement ..................................................................... 20
5 V Supply ................................................................................... 3 Effect of Feedback Resistor on Frequency Response ............ 20
5 V Supply ...................................................................................... 4 Compensating Peaking in Large Signal Frequency Response
....................................................................................................... 20
3 V Supply ...................................................................................... 5
Driving Low Power, High Resolution Successive
Absolute Maximum Ratings ............................................................ 7
Approximation Register (SAR) ADCs..................................... 20
Thermal Resistance ...................................................................... 7
Dynamic Power Scaling ............................................................. 21
Maximum Power Dissipation ..................................................... 7
Single-Ended to Differential Conversion ................................... 23
ESD Caution .................................................................................. 7
Layout Considerations ............................................................... 23
Pin Configurations and Function Descriptions ........................... 8
Outline Dimensions ....................................................................... 24
Typical Performance Characteristics ........................................... 10
Ordering Guide .......................................................................... 25
Test Circuits ..................................................................................... 17
Theory of Operation ...................................................................... 18
REVISION HISTORY
12/14Rev. A to Rev. B Changes to Figure 7 Caption, Figure 8 Caption, Figure 9
Caption, Figure 10 Caption, and Figure 11 Caption..................... 9
Added 10-Lead LFCSP ....................................................... Universal
Changes to SHUTDOWN Current Parameter, Table 2 ................ 3 Changes to Figure 13 Caption, Figure 14, Figure 17, and
Figure 18 ........................................................................................... 10
Changes to SHUTDOWN Current Parameter, Table 3 ................ 5
Change to Figure 29 ........................................................................ 12
Changes to SHUTDOWN Current Parameter, Table 4 ................ 6
Moved Figure 41 .............................................................................. 15
Changes to Table 6 and Figure 3 ...................................................... 7
Changes to Figure 42 ....................................................................... 15
Changes to Table 8 ............................................................................. 9
Added Figure 43 .............................................................................. 15
Added Figure 6, Renumbered Sequentially ................................... 9
Changes to Figure 47 and Figure 48.............................................. 16
Added Figure 42 ............................................................................... 16
Changes to Amplifier Description Section, Input Protection
Changed Layout ............................................................................... 16
Section, Shutdown Operation Section, and Figure 51................ 17
Changes to Shutdown Operation Section .................................... 18
Changes to Noise Considerations Section and Figure 52 .......... 18
Changes to Dynamic Power Scaling Section and Figure 61 ...... 21
Changes to Effect of Feedback Resistor on Frequency Response
Changes to Figure 62 and Figure 63 .............................................. 22
Section, Compensating Peaking in Large Signal Frequency
Updated Outline Dimensions ........................................................ 25
Response Section, Figure 57, and Driving Low Power, High
Changes to Ordering Guide ........................................................... 25
Resolution Successive Approximation Register (SAR) ADC
S ection ............................................................................................... 19
9/14Rev. 0 to Rev. A
Changes to Figure 58, Dynamic Power Scaling Section,
Added ADA4805-2 ............................................................. Universal
Figure 59, and Table 10 ................................................................... 20
Changes to Features Section, General Description Section, and
Change to Figure 60 ........................................................................ 21
Table 1 ................................................................................................. 1
Changes to Single-Ended to Differential Conversion Section,
Changes to Table 2 ............................................................................. 3
Table 11, and Figure 62 ................................................................... 22
Changes to Table 3 ............................................................................. 4
Updated Outline Dimensions, Figure 65 ..................................... 24
Changes to Table 4 ............................................................................. 5
Changes to Ordering Guide ........................................................... 24
Changes to Table 6 and Figure 3 ...................................................... 7
Added Figure 6; Renumbered Sequentially; and Table 8;
7/14Revision 0: Initial Version
Renumbered Sequentially ................................................................. 8
Rev. B | Page 2 of 25