Unity-Gain Stable, Ultralow Distortion, 1 nV/ Hz Voltage Noise, High Speed Op Amp Data Sheet ADA4899-1 FEATURES CONNECTION DIAGRAMS ADA4899-1 Unity-gain stable DISABLE 1 8+V S Ultralow noise: 1 nV/Hz, 2.6 pA/Hz FEEDBACK 2 7V OUT Ultralow distortion 117 dBc at 1 MHz IN 3 6NIC High speed +IN 4 5V S 3 dB bandwidth: 600 MHz (G = +1) NOTES Slew rate: 310 V/s 1. NIC = NO INTERNAL CONNECTION. Offset voltage: 230 V maximum 2. THE EXPOSED PAD MUST BE SOLDERED TO THE GROUND PLANE. Low input bias current: 100 nA Figure 1. 8-Lead LFCSP (CP-8-13) Wide supply voltage range: 5 V to 12 V ADA4899-1 TOP VIEW Supply current: 14.7 mA (Not to Scale) High performance pinout 1 8 FEEDBACK DISABLE Disable mode IN 2 7 +V S 3 6 +IN V OUT APPLICATIONS 4 5 V V S S Analog-to-digital drivers NOTES Instrumentation 1. THE EXPOSED PAD MUST BE SOLDERED TO THE GROUND PLANE. Filters Figure 2. 8-Lead SOIC (RD-8-1) IF and baseband amplifiers DAC buffers Optical electronics GENERAL DESCRIPTION The ADA4899-1 is an ultralow noise (1 nV/Hz) and distortion The ADA4899-1 is available in a 3 mm 3 mm LFCSP and an (<117 dBc at 1 MHz) unity-gain stable voltage feedback op 8-lead SOIC package. Both packages feature an exposed metal amp, the combination of which makes it ideal for 16-bit and paddle that improves heat transfer to the ground plane, which is 18-bit systems. The ADA4899-1 features a linear, low noise a significant improvement over traditional plastic packages. The input stage and internal compensation that achieves high slew ADA4899-1 is rated to work over the extended industrial rates and low noise even at unity gain. The Analog Devices, temperature range, 40C to +125C. Inc., proprietary next-generation XFCB process and innovative 40 G = +1 circuit design enable such high performance amplifiers. V = 5V S 50 R = 1k L V = 2V p-p OUT The ADA4899-1 drives 100 loads at breakthrough performance 60 levels with only 15 mA of supply current. With the wide supply 70 voltage range (4.5 V to 12 V), low offset voltage (230 V maxi- mum), wide bandwidth (600 MHz), and slew rate (310 V/s), 80 HD3 the ADA4899-1 is designed to work in the most demanding 90 HD2 applications. The ADA4899-1 also features an input bias current 100 cancellation mode that reduces input bias current by a factor of 60. 110 120 130 0.1 1 10 100 FREQUENCY (MHz) Figure 3. Harmonic Distortion vs. Frequency Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. 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HARMONIC DISTORTION (dBc) 05720-002 05720-001 05720-071ADA4899-1 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Packaging Innovation ................................................................ 13 Applications ....................................................................................... 1 DISABLE Pin .............................................................................. 13 Connection Diagrams ...................................................................... 1 Applications Information .............................................................. 14 General Description ......................................................................... 1 Unity-Gain Operation ............................................................... 14 Revision History ............................................................................... 2 Recommended Values for Various Gains ................................ 14 Specifications with 5 V Supply ..................................................... 3 Noise ............................................................................................ 15 Specifications with +5 V Supply ..................................................... 4 ADC Driver ................................................................................. 15 Absolute Maximum Ratings ............................................................ 5 DISABLE Pin Operation ........................................................... 16 Maximum Power Dissipation ..................................................... 5 ADA4899-1 Mux ........................................................................ 16 ESD Caution .................................................................................. 5 Circuit Considerations .............................................................. 16 Typical Performance Characteristics ............................................. 6 Outline Dimensions ....................................................................... 18 Test Circuits ..................................................................................... 12 Ordering Guide .......................................................................... 18 Theory of Operation ...................................................................... 13 REVISION HISTORY 5/2016Rev. B to Rev. C Changed CP-8-2 to CP-8-13 ........................................ Throughout Changes to Figure 1 and Figure 2 ................................................... 1 Updated Outline Dimensions ....................................................... 18 Changes to Ordering Guide .......................................................... 18 6/2007Rev. A to Rev. B Changes to Table 1 ............................................................................ 3 Changes to Table 2 ............................................................................ 4 Changes to Figure 21 and Figure 22 ............................................... 8 Changes to Packaging Innovation Section .................................. 13 Changes to Figure 49 and Figure 50 ............................................. 15 Updated Outline Dimensions ....................................................... 18 4/2006Rev. 0 to Rev. A Changes to Figure 2 .......................................................................... 1 10/2005Revision 0: Initial Version Rev. C Page 2 of 20