Low Power, Differential ADC Driver Data Sheet ADA4932-1/ADA4932-2 FEATURES FUNCTIONAL BLOCK DIAGRAM High performance at low power ADA4932-1 High speed 3 dB bandwidth of 560 MHz, G = 1 0.1 dB gain flatness to 300 MHz FB 1 12 PD Slew rate: 2800 V/s, 25% to 75% +IN 2 11 OUT Fast 0.1% settling time of 9 ns IN 3 10 +OUT Low power: 9.6 mA per amplifier 49 +FB V OCM Low harmonic distortion 100 dB SFDR at 10 MHz 90 dB SFDR at 20 MHz Low input voltage noise: 3.6 nV/Hz Figure 1. ADA4932-1 0.5 mV typical input offset voltage ADA4932-2 Externally adjustable gain Can be used with gains less than 1 Differential-to-differential or single-ended-to-differential operation IN1 1 18 +OUT1 Adjustable output common-mode voltage +FB1 2 17 V OCM1 Input common-mode range shifted down by 1 V 16 BE +V 3 V S1 S2 +V 15 V 4 Wide supply range: +3 V to 5 V S1 S2 FB2 5 14 PD2 Available in 16-lead and 24-lead LFCSP packages +IN2 6 13 OUT2 APPLICATIONS ADC drivers Single-ended-to-differential converters IF and baseband gain blocks Figure 2. ADA4932-2 Differential buffers Line drivers GENERAL DESCRIPTION The ADA4932-1/ADA4932-2 are the next generation AD8132 The ADA4932-1/ADA4932-2 were fabricated using the with higher performance and lower noise and power consumption. Analog Devices, Inc., proprietary silicon-germanium (SiGe) They are an ideal choice for driving high performance ADCs as complementary bipolar process, enabling it to achieve low levels a single-ended-to-differential or differential-to-differential of distortion and noise at low power consumption. amplifier. The output common-mode voltage is user adjustable The low offset and excellent dynamic performance of the by means of an internal common-mode feedback loop, allowing ADA4932-1/ADA4932-2 make them well suited for a wide the ADA4932-1/ADA4932-2 output to match the input of the variety of data acquisition and signal processing applications. ADC. The internal feedback loop also provides exceptional The ADA4932-1 is available in a 16-lead LFCSP, and the output balance as well as suppression of even-order harmonic ADA4932-2 is available in a 24-lead LFCSP. The pinouts are distortion products. optimized to facilitate the printed circuit board (PCB) layout With the ADA4932-1/ADA4932-2, differential gain configurations and minimize distortion. The ADA4932-1/ADA4932-2 are are easily realized with a simple external four-resistor feedback specified to operate over the 40C to +105C temperature network that determines the closed-loop gain of the amplifier. range both operate on supplies between +3 V and 5 V. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20082016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. +V V S S +V V S S V +V S S +V V S S 07752-001 07752-002 IN2 7 24 +IN1 5 16 +FB2 8 23 FB1 6 15 +V 9 22 V S2 S1 14 7 +V 10 21 V S1 S2 8 13 20 V 11 PD1 OCM2 19 OUT1 +OUT2 12ADA4932-1/ADA4932-2 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 19 Applications ....................................................................................... 1 Applications Information .............................................................. 20 Functional Block Diagram .............................................................. 1 Analyzing an Application Circuit ............................................ 20 General Description ......................................................................... 1 Setting the Closed-Loop Gain .................................................. 20 Revision History ............................................................................... 2 Estimating the Output Noise Voltage ...................................... 20 Specifications ..................................................................................... 3 Impact of Mismatches in the Feedback Networks ................. 21 5 V Operation ............................................................................. 3 Calculating the Input Impedance for an Application Circuit .... 21 5 V Operation ............................................................................... 5 Input Common-Mode Voltage Range ..................................... 23 Absolute Maximum Ratings ............................................................ 7 Input and Output Capacitive AC Coupling ............................ 23 Thermal Resistance ...................................................................... 7 Setting the Output Common-Mode Voltage .......................... 23 Maximum Power Dissipation ..................................................... 7 High Performance Precision ADC Driver .............................. 23 ESD Caution .................................................................................. 7 High Performance ADC Driving ................................................. 25 Pin Configurations and Function Descriptions ........................... 8 Layout, Grounding, and Bypassing .............................................. 26 Typical Performance Characteristics ............................................. 9 Outline Dimensions ....................................................................... 27 Test Circuits ..................................................................................... 17 Ordering Guide .......................................................................... 27 Terminology .................................................................................... 18 REVISION HISTORY 5/2016Rev. D to Rev. E 1/2014Rev. B to Rev. C Changed ADA4932 Family to ADA4932-1/ADA4932-2, Changes to Figure 51 ...................................................................... 16 ADA4932-x to ADA4932-1/ADA4932-2, and CP-16-2 to CP-16-21 ......................................................................... Throughout 3/2013Rev. A to Rev. B Deleted Figure 2 and Figure 3 Renumbered Sequentially .......... 1 Updated Outline Dimensions ....................................................... 26 Added Figure 2 .................................................................................. 1 Changes to Ordering Guide .......................................................... 26 Updated Outline Dimensions ....................................................... 27 Changes to Ordering Guide .......................................................... 27 8/2009Rev. 0 to Rev. A Changes to Features Section ............................................................ 1 Changes to Figure 11 ......................................................................... 9 4/2014Rev. C to Rev. D Changes to Figure 43 and Figure 45 ............................................ 15 Changes to Features Section, Figure 2, and Figure 3 ................... 1 Changes to Figure 52, Figure 53, and Figure 54 ......................... 17 Changes to Setting the Output Common-Mode Voltage Section .. 23 Added High Performance Precision ADC Driver Section ....... 24 10/2008Revision 0: Initial Version Moved Layout, Grounding, and Bypassing Section ................... 26 Rev. E Page 2 of 27