SigmaDSP Digital Audio Processor Data Sheet ADAU1452/ADAU1451/ADAU1450 2 FEATURES I C and SPI control interfaces (both slave and master) Standalone operation Qualified for automotive applications Self boot from serial EEPROM Fully programmable audio DSP for enhanced sound processing 6-channel, 10-bit SAR auxiliary control ADC Features SigmaStudio, a proprietary graphical programming 14 multipurpose pins for digital controls and outputs tool for the development of custom signal flows On-chip regulator for generating 1.2 V from 3.3 V supply Up to 294.912 MHz, 32-bit SigmaDSP core at 1.2 V 72-lead, 10 mm 10 mm LFCSP package with 5.3 mm Up to 6144 SIMD instructions per sample at 48 kHz exposed pad Up to 40 kWords of parameter/data RAM Available in two temperature ranges: Up to 800 ms digital audio delay pool at 48 kHz 40C to +105C Audio input/output and routing 0C to +70C 4 serial input ports, 4 serial output ports 48-channel, 32-bit digital input/output up to a sample rate APPLICATIONS of 192 kHz Automotive audio processing 2 Flexible configuration for TDM, I S, left and right justified Head units formats, and PCM Navigation systems Up to 8 stereo ASRCs from 1:8 up to 7.75:1 ratio and Rear seat entertainment systems 139 dB DNR DSP amplifiers (sound system amplifiers) Stereo S/PDIF input and output (not on the ADAU1450) Commercial and professional audio processing Four PDM microphone input channels Consumer audio processing Multichannel, byte addressable, TDM serial ports Clock oscillator for generating master clock from crystal Integer PLL and flexible clock generators Integrated die temperature sensor FUNCTIONAL BLOCK DIAGRAMADAU1452/ADAU1451 2 2 SPI/I C* SPI/I C* PLLFILT ADAU1452/ ADAU1451 VDRIVE REGULATOR 2 2 I C/SPI GPIO/ CLOCK I C/SPI CLKOUT PLL AUX ADC OSCILLATOR SLAVE MASTER THD P TEMPERATURE SENSOR THD M INPUT AUDIO OUTPUT AUDIO ROUTING MATRIX ROUTING MATRIX 2 294.912MHz PROGRAMMABLE AUDIO S/PDIF S/PDIF SPDIFIN PROCESSING CORE SPDIFOUT RECEIVER TRANSMITTER RAM, ROM, WATCHDOG, MEMORY PARITY CHECK SERIAL DATA SDATA IN3 TO SDATA IN0 SDATA OUT3 TO SDATA OUT0 INPUT PORTS SERIAL DATA (48-CHANNEL (48-CHANNEL (4) DIGITAL AUDIO OUTPUT PORTS 8 2-CHANNEL DIGITAL AUDIO (4) INPUTS) ASYNCHRONOUS OUTPUTS) SAMPLE RATE DIGITAL CONVERTERS MIC INPUT INPUT OUTPUT BCLK IN3 TO BCLK IN0/ BCLK OUT3 TO BCLK OUT0 CLOCK DEJITTER AND CLOCK LRCLK IN3 TO LRCLK IN0 LRCLK OUT3 TO LRCLK OUT0 CLOCK GENERATOR DOMAINS DOMAINS (INPUT CLOCK PAIRS) (OUTPUT CLOCK PAIRS) (4) (4) 2 *SPI/I C INCLUDES THE FOLLOWING PIN FUNCTIONS: SS M, MOSI M, SCL M, SCLK M, SDA M, MISO M, MISO, SDA, SCLK, SCL, MOSI, ADDR1, SS, AND ADDR0 PINS. Figure 1. Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20132018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. SELFBOOT MP13 TO MP0 AUXADC5 TO AUXADC0 XTALIN/MCLK XTALOUT 11486-001ADAU1452/ADAU1451/ADAU1450 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Auxiliary ADC ............................................................................ 88 Applications ....................................................................................... 1 SigmaDSP Core .......................................................................... 88 Functional Block DiagramADAU1452/ADAU1451 ................. 1 Software Features ....................................................................... 93 Revision History ............................................................................... 3 Pin Drive Strength, Slew Rate, and Pull Configuration ........ 94 Functional Block DiagramADAU1450 ...................................... 5 Global RAM and Control Register Map ...................................... 96 General Description ......................................................................... 6 Random Access Memory .......................................................... 96 Differences Between the ADAU1452, ADAU1452-150, Control Registers Overview ...................................................... 97 ADAU1452K, ADAU1451, and ADAU1450 .............................. 6 Control Register Details .............................................................. 107 Specifications ..................................................................................... 7 PLL Configuration Registers .................................................. 107 Electrical Characteristics ........................................................... 11 Clock Generator Registers ...................................................... 112 Timing Specifications ................................................................ 12 Power Reduction Registers ..................................................... 116 Absolute Maximum Ratings .......................................................... 21 Audio Signal Routing Registers .............................................. 119 Thermal Characteristics ............................................................ 21 Serial Port Configuration Registers ....................................... 124 Maximum Power Dissipation ................................................... 21 Flexible TDM Interface Registers ........................................... 128 ESD Caution ................................................................................ 22 DSP Core Control Registers .................................................... 132 Pin Configuration and Function Descriptions ........................... 23 Debug and Reliability Registers .............................................. 137 Theory of Operation ...................................................................... 28 DSP Program Execution Registers ......................................... 146 System Block Diagram ............................................................... 28 Multipurpose Pin Configuration Registers........................... 149 Overview ...................................................................................... 28 ASRC Status and Control Registers ....................................... 154 Initialization ................................................................................ 30 Auxiliary ADC Registers ......................................................... 158 Master Clock, PLL, and Clock Generators.............................. 33 S/PDIF Interface Registers ...................................................... 159 Power Supplies, Voltage Regulator, and Hardware Reset ...... 40 Hardware Interfacing Registers .............................................. 172 Temperature Sensor Diode........................................................ 42 Soft Reset Register .................................................................... 190 Slave Control Ports ..................................................................... 42 Applications Information ............................................................ 191 Master Control Ports .................................................................. 50 PCB Design Considerations ................................................... 191 Self Boot ....................................................................................... 52 Typical Applications Block Diagram ..................................... 192 Audio Signal Routing ................................................................. 54 Example PCB Layout ............................................................... 193 Serial Data Input/Output........................................................... 65 PCB Manufacturing Guidelines ............................................. 194 Flexible TDM Interface .............................................................. 76 Outline Dimensions ..................................................................... 195 Asynchronous Sample Rate Converters .................................. 81 Ordering Guide ........................................................................ 195 Digital PDM Microphone Interface ......................................... 84 Automotive Products ............................................................... 195 Multipurpose Pins ...................................................................... 85 Rev. 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