SigmaDSP Digital Audio Processor Data Sheet ADAU1462/ADAU1466 FEATURES Clock oscillator for generating master clock from crystal Integer PLL and flexible clock generators Qualified for automotive applications Integrated die temperature sensor Fully programmable audio DSP for enhanced sound processing 2 I C and SPI control interfaces (both slave and master) Features SigmaStudio, a proprietary graphical programming Standalone operation tool for the development of custom signal flows Self-boot from serial EEPROM Up to 294.912 MHz, 32-bit SigmaDSP core at 1.2 V 6-channel, 10-bit SAR auxiliary control ADC Up to 24 kWords of program memory 14 multipurpose pins for digital controls and outputs Up to 80 kWords of parameter/data RAM On-chip regulator for generating 1.2 V from 3.3 V supply Up to 6144 SIMD instructions per sample at 48 kHz 72-lead, 10 mm 10 mm LFCSP package with 5.3 mm Up to 1600 ms digital audio delay pool at 48 kHz exposed pad Audio I/O and routing Temperature range: 40C to +105C 4 serial input ports, 4 serial output ports 48-channel, 32-bit digital I/O up to a sample rate of 192 kHz APPLICATIONS 2 Flexible configuration for TDM, I S, left and right justified Automotive audio processing formats, and PCM Head units Up to 8 stereo ASRCs from 1:8 up to 7.75:1 ratio and Distributed amplifiers 139 dB dynamic range Rear seat entertainment systems Stereo S/PDIF input and output at 192 kHz Trunk amplifiers Four PDM microphone input channels Commercial and professional audio processing Multichannel, byte addressable TDM serial ports FUNCTIONAL BLOCK DIAGRAM 2 2 SPI/I C* SPI/I C* PLLFILT ADAU1462/ ADAU1466 VDRIVE REGULATOR 2 2 GPIO/ CLOCK I C/SPI I C/SPI PLL CLKOUT AUX ADC OSCILLATOR SLAVE MASTER THD P TEMPERATURE SENSOR THD M INPUT AUDIO OUTPUT AUDIO ROUTING MATRIX ROUTING MATRIX 294.912MHz PROGRAMMABLE AUDIO S/PDIF S/PDIF SPDIFIN PROCESSING CORE SPDIFOUT RECEIVER TRANSMITTER RAM, ROM, WATCHDOG, MEMORY PARITY CHECK SERIAL DATA SDATA IN3 TO SDATA IN0 SDATA OUT3 TO SDATA OUT0 INPUT PORTS SERIAL DATA (48-CHANNEL (48-CHANNEL (4) OUTPUT PORTS 8 2-CHANNEL DIGITAL AUDIO DIGITAL AUDIO (4) ASYNCHRONOUS INPUTS) OUTPUTS) SAMPLE RATE DIGITAL CONVERTERS MIC INPUT BCLK IN3 TO BCLK IN0/ INPUT OUTPUT BCLK OUT3 TO BCLK OUT0 CLOCK DEJITTER AND CLOCK LRCLK IN3 TO LRCLK IN0 LRCLK OUT3 TO LRCLK OUT0 CLOCK GENERATOR DOMAINS DOMAINS (INPUT CLOCK PAIRS) (OUTPUT CLOCK PAIRS) (4) (4) 2 *SPI/I C INCLUDES THE FOLLOWING PIN FUNCTIONS: SS M, MOSI M, SCL M, SCLK M, SDA M, MISO M, MISO, SDA, SCLK, SCL, MOSI, ADDR1, SS, AND ADDR0 PINS. Figure 1. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20172018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. SELFBOOT MP13 TO MP0 AUXADC5 TO AUXADC0 XTALIN/MCLK XTALOUT 14810-001ADAU1462/ADAU1466 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Software Features ....................................................................... 86 Applications ....................................................................................... 1 Pin Drive Strength, Slew Rate, and Pull Configuration ........ 87 Functional Block Diagram .............................................................. 1 Global RAM and Control Register Map ...................................... 89 Revision History ............................................................................... 3 Random Access Memory .......................................................... 89 General Description ......................................................................... 4 Control Registers ........................................................................ 92 Differences Between the ADAU1466 and ADAU1462 ........... 4 Control Register Details ................................................................ 98 Specif icat ions ..................................................................................... 5 PLL Configuration Registers .................................................... 98 Electrical Characteristics ............................................................. 7 Clock Generator Registers ...................................................... 103 Timing Specifications .................................................................. 9 Power Reduction Registers ..................................................... 108 Absolute Maximum Ratings .......................................................... 17 Audio Signal Routing Registers .............................................. 111 Thermal Considerations ............................................................ 17 Serial Port Configuration Registers ....................................... 117 ESD Caution ................................................................................ 17 Flexible TDM Interface Registers ........................................... 121 Pin Configuration and Function Descriptions ........................... 18 DSP Core Control Registers .................................................... 124 Theory of Operation ...................................................................... 22 Debug and Reliability Registers .............................................. 129 System Block Diagram ............................................................... 22 Software Panic Value 0 Register ............................................. 136 O ver vie w ...................................................................................... 22 Software Panic Value 1 Register ............................................. 136 Initialization ................................................................................ 24 DSP Program Execution Registers ......................................... 139 Master Clock, PLL, and Clock Generators.............................. 28 Panic Mask Registers ............................................................... 142 Power Supplies, Voltage Regulator, and Hardware Reset ...... 33 Multipurpose Pin Configuration Registers........................... 155 Temperature Sensor Diode........................................................ 34 ASRC Status and Control Registers ....................................... 160 Slave Control Ports ..................................................................... 35 Auxiliary ADC Registers ......................................................... 164 Slave Control Port Addressing .................................................. 35 S/PDIF Interface Registers ...................................................... 165 Slave Port to DSP Core Address Mapping .............................. 36 Hardware Interfacing Registers .............................................. 178 Master Control Ports .................................................................. 44 Soft Reset Register .................................................................... 196 Self Boot ....................................................................................... 45 Applications Information ............................................................ 197 Audio Signal Routing ................................................................. 48 PCB Design Considerations ................................................... 197 Serial Data Input/Output........................................................... 57 Typical Applications Block Diagram ..................................... 199 Flexible TDM Interface .............................................................. 68 Example PCB Layout ............................................................... 200 Asynchronous Sample Rate Converters .................................. 74 PCB Manufacturing Guidelines ............................................. 201 S/PDIF Interface ......................................................................... 74 Outline Dimensions ..................................................................... 202 Digital PDM Microphone Interface ......................................... 76 Ordering Guide ........................................................................ 202 Multipurpose Pins ...................................................................... 77 Automotive Products ............................................................... 202 Auxiliary ADC ............................................................................ 80 SigmaDSP Core .......................................................................... 80 Rev. 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