Class-D Audio Power Amplifier ADAU1592 FEATURES GENERAL DESCRIPTION Integrated stereo modulator and power stage The ADAU1592 is a 2-channel, bridge-tied load (BTL) 0.005% THD + N switching audio power amplifier with an integrated - 101 dB dynamic range modulator. PSRR > 65 dB The modulator accepts an analog input signal and generates R < 0.3 (per transistor) DS-ON a switching output to drive speakers directly. A digital, Efficiency > 90% (8 ) microcontroller-compatible interface provides control of reset, EMI-optimized modulator mute, and PGA gain as well as output signals for thermal and On/off-mute pop-noise suppression overcurrent error conditions. The output stage can operate Short-circuit protection from supply voltages ranging from 9 V to 18 V. The analog Overtemperature protection modulator and digital logic operate from a 3.3 V supply. APPLICATIONS Flat panel televisions PC audio systems Mini-components FUNCTIONAL BLOCK DIAGRAM PGA0 PGA1 PVDD AINL PGA A1 OUTL+ A2 PGND PVDD B1 OUTL SLC TH SLICER B2 PGND LEVEL SHIFT - AND DEAD MODULATOR TIME CONTROL PVDD C1 OUTR+ C2 PGND AINR PGA PVDD PGA0 PGA1 D1 OUTR AVDD D2 PGND f /2 CLK VREF VOLTAGE REFERENCE TEMPERATURE/ AGND CLOCK MODE CONTROL OVERCURRENT OSCILLATOR LOGIC PROTECTION DVDD DGND ADAU1592 XTI XTO MO/ST STDN MUTE ERR OTW Figure 1. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 www.analog.com No license is granted by implication or otherwise under any patent or patent rights of Analog Fax: 781.461.3113 20072020 Analog Devices, Inc. All rights reserved. Devices. Trademarks and registered trademarks are the property of their respective owners. 06 74 9-0 01ADAU1592 TABLE OF CONTENTS Features .............................................................................................. 1 Power Stage ................................................................................. 16 Applications ...................................................................................... 1 Gain .............................................................................................. 16 General Description ......................................................................... 1 Protection Circuits ..................................................................... 16 Functional Block Diagram .............................................................. 1 Thermal Protection .................................................................... 16 Revision History ............................................................................... 2 Overcurrent Protection ............................................................. 16 Specifications .................................................................................... 3 Undervoltage Protection ........................................................... 17 Audio Performance ...................................................................... 3 Clock Loss Detection ................................................................. 17 DC Specifications ......................................................................... 4 Automatic Recovery from Protections ................................... 17 Power Supplies .............................................................................. 4 MUTE and STDN ...................................................................... 17 Digital I/O ..................................................................................... 4 Power-Up/Power-Down Sequence ......................................... 18 Digital Timing............................................................................... 5 DC Offset and Pop Noise .......................................................... 19 Absolute Maximum Ratings ........................................................... 6 Selecting Values for CREF and CIN ............................................. 19 Thermal Resistance ...................................................................... 6 Mono Mode ................................................................................ 19 ESD Caution.................................................................................. 6 Power Supply Decoupling......................................................... 19 Pin Configuration and Function Descriptions ............................ 7 External Protection for PVDD > 15 V .................................... 20 Typical Performance Characteristics ............................................. 9 Clock ............................................................................................ 20 Theory of Operation ...................................................................... 15 Applications Information ............................................................. 21 Overview ...................................................................................... 15 Outline Dimensions ....................................................................... 23 Modulator .................................................................................... 15 Ordering Guide .......................................................................... 23 Slicer ............................................................................................. 15 REVISION HISTORY 9/2020Rev. A to Rev. B Changed CP-48-1 to CP-48-4 ...................................... Throughout Added Figure 4 Renumbered Sequentially .................................. 7 Updated Outline Dimensions ....................................................... 23 Changes to Ordering Guide .......................................................... 23 9/2007Rev. 0 to Rev. A Changes to Figure 14, Figure 15, and Figure 16 ......................... 10 Changes to Applications Information Section ........................... 21 Changes to Ordering Guide .......................................................... 23 5/2007Revision 0: Initial Version Rev. B Page 2 of 24