2.5 V/3.3 V, Four LVPECL Outputs, SiGe Clock Fanout Buffer ADCLK944 FEAFEATTURESURES FUNCFUNCTITIONONAALL BL BLOCK DIOCK DIAAGGRRAM AM OOppereraating frting frequencequency: 7.0y: 7.0 GH GHzz LVPECL BrBroadband roadband raandom jittndom jitterer: 50 fs rms : 50 fs rms ADCLK944 Q0 OOn-n-cchip input thip input teerminarminations tions Q0 PoPowweerr s suuppppllyy ( (VV VV ): 2.5): 2.5 VV ttoo 3.3 3.3 VV CCCC EEEE V REF REFERENCE Q1 APPLICAPPLICAATTIOIONS NS Q1 V T LLoow jittw jitter clock distribuer clock distribution tion Q2 Clock and daClock and datta a signal restsignal restororaattiioon n CLK Q2 LevLeveel trl translatanslatiioon n CLK WWirireeless cless coommmmunicunicaationstions Q3 WWirireed cd coommunmmunicicaationstions Q3 MedicMedicaal and inl and industriadustriall imagin imaging g AATTE and high pE and high peerrfformancormance inse instrumentrumentatation tion Figure 1. The ADCLK944 features four full-swing emitter-coupled logic GENERAL DESCRIPTION (ECL) output drivers. For LVPECL (positive ECL) operation, The ADCLK944 is an ultrafast clock fanout buffer fabricated on bias VCC to the positive supply and VEE to ground. For ECL the Analog Devices, Inc., proprietary XFCB3 silicon germanium operation, bias V to ground and V to the negative supply. CC EE (SiGe) bipolar process. This device is designed for high speed The ECL output stages are designed to directly drive 800 mV applications requiring low jitter. each side into 50 terminated to V 2 V for a total differen- CC The device has a differential input equipped with center-tapped, tial output swing of 1.6 V. differential, 100 on-chip termination resistors. The input can accept dc-coupled LVPECL, CML, 3.3 V CMOS (single-ended), The ADCLK944 is available in a 16-lead LFCSP and is specified and ac-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A V for operation over the standard industrial temperature range of REF pin is available for biasing ac-coupled inputs. 40C to +85C. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 08770-001ADCLK944 TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................5 Applications ....................................................................................... 1 Thermal Performance ...................................................................5 Functional Block Diagram .............................................................. 1 Pin Configuration and Function Descriptions ..............................6 General Description ......................................................................... 1 Typical Performance Characteristics ..............................................7 Revision History ............................................................................... 2 Theory of Operation .........................................................................9 Specif icat ions ..................................................................................... 3 Clock Inputs ...................................................................................9 Clock Inputs and Outputs ........................................................... 3 Clock Outputs ................................................................................9 Timing Characteristics ................................................................ 3 PCB Layout Considerations ...................................................... 10 Power .............................................................................................. 4 Input Termination Options ....................................................... 11 Absolute Maximum Ratings ............................................................ 5 Outline Dimensions ....................................................................... 12 Determining Junction Temperature .......................................... 5 Ordering Guide .......................................................................... 12 REVISION HISTORY 3/10Revision 0: Initial Version Rev. 0 Page 2 of 12