ADDI9023BBCZ Analog Devices

Vertical Driver for CCD Cameras Data Sheet ADDI9023 FEATURES GENERAL DESCRIPTION 12-channel vertical driver The ADDI9023 is a 12-channel vertical driver for charge-coupled 8 three-level drivers device (CCD) imaging applications. It includes eight three-level 4 two-level drivers drivers and four two-level drivers. The input configuration can Substrate clock driver support up to nine individual vertical timing phases and eight shift Input logic supports a 1.6 V to 3.6 V range gate signals. A separate substrate clock channel (SUBCK) is also Output drivers support a 9.5 V to +15.5 V range included. Typical load drive capability for each channel is 3 nF. 6 mm 6 mm CSP BGA package with 0.65 mm pitch The ADDI9023 is specified over an operating temperature range of 25C to +85C. APPLICATIONS Digital still cameras Industrial cameras Surveillance cameras Medical imaging FUNCTIONAL BLOCK DIAGRAM VDD VH VM VL ADDI9023 XSG1 + V1A XV1 + V1B XSG2 XSG3 V2A + XV2 + V2B XSG4 THREE-LEVEL OUTPUTS XSG5 + V3A XV3 + V3B XSG6 XSG7 + V4 XV4 XV5 + V5 XSG8 XV6 V6 XV7 V7 TWO-LEVEL OUTPUTS XV8 V8 V9 XV9 XSUBCK SUBCK VLL Figure 1. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 2012 Analog Devices, Inc. All rights reserved. 10693-004ADDI9023 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Pin Configuration and Function Descriptions ..............................6 Applications ....................................................................................... 1 Input/Output Logic States ................................................................8 General Description ......................................................................... 1 Applications Information .............................................................. 10 Functional Block Diagram .............................................................. 1 Power-Up Sequence ................................................................... 10 Revision History ............................................................................... 2 Power-Down Sequence .............................................................. 10 Specifications ..................................................................................... 3 Circuit Layout Information ....................................................... 11 Output Driver Specifications ...................................................... 4 Outline Dimensions ....................................................................... 12 Absolute Maximum Ratings ............................................................ 5 Ordering Guide .......................................................................... 12 Thermal Resistance ...................................................................... 5 ESD Caution .................................................................................. 5 REVISION HISTORY 4/12Revision 0: Initial Version Rev. 0 Page 2 of 12