Fractional-N Frequency Synthesizer Data Sheet ADF4153 FEATURES GENERAL DESCRIPTION RF bandwidth to 4 GHz The ADF4153 is a fractional-N frequency synthesizer 2.7 V to 3.3 V power supply that implements local oscillators in the upconversion Separate V allows extended tuning voltage P and downconversion sections of wireless receivers and Y version available: 40C to +125C transmitters. It consists of a low noise digital phase Programmable fractional modulus frequency detector (PFD), a precision charge pump, and Programmable charge pump currents a programmable reference divider. There is a - based 3-wire serial interface fractional interpolator to allow programmable fractional-N Analog and digital lock detect division. The INT, FRAC, and MOD registers define an Power-down mode overall N divider (N = (INT + (FRAC/MOD))). In addition, Pin-compatible with ADF4110/ADF4111/ADF4112/ADF4113 the 4-bit reference counter (R counter) allows selectable and ADF4106 REFIN frequencies at the PFD input. A complete phase- Consistent RF output phase locked loop (PLL) can be implemented if the synthesizer is Loop filter design possible with ADIsimPLL used with an external loop filter and a voltage controlled Qualified for automotive applications oscillator (VCO). APPLICATIONS A simple 3-wire interface controls all on-chip registers. The device operates with a power supply ranging from CATV equipment 2.7 V to 3.3 V and can be powered down when not in use. Base stations for mobile radio (GSM, PCS, DCS, WiMAX, SuperCell 3G, CDMA, W-CDMA) Wireless handsets (GSM, PCS, DCS, CDMA, W-CDMA) Wireless LANs, PMR Communications test equipment FUNCTIONAL BLOCK DIAGRAM AV DV V SDV R DD DD P DD SET ADF4153 REFERENCE 4-BIT 2 REF IN R COUNTER DOUBLER + PHASE CHARGE CP FREQUENCY PUMP V DETECTOR DD HIGH-Z DGND LOCK CURRENT DETECT SETTING OUTPUT MUXOUT V DD MUX R DIV RFCP3 RFCP2 RFCP1 N DIV RF A IN N-COUNTER RF B IN THIRD ORDER FRACTIONAL INTERPOLATOR CLK FRACTION MODULUS INTEGER 24-BIT DATA REG REG REG DATA LE REGISTER AGND DGND CPGND Figure 1. Rev. G Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20032016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 03685-001ADF4153 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 R Divider Register, R1................................................................ 17 Applications ....................................................................................... 1 Control Register, R2 ................................................................... 17 General Description ......................................................................... 1 Noise and Spur Register, R3 ...................................................... 18 Functional Block Diagram .............................................................. 1 Reserved Bits ............................................................................... 18 Revision History ............................................................................... 3 Initialization Sequence .............................................................. 19 Specifications ..................................................................................... 4 RF Synthesizer: A Worked Example ........................................ 19 Timing Specifications .................................................................. 5 Modulus ....................................................................................... 19 Absolute Maximum Ratings ............................................................ 6 Reference Doubler and Reference Divider ............................. 19 ESD Caution .................................................................................. 6 12-Bit Programmable Modulus ................................................ 19 Pin Configurations and Function Descriptions ........................... 7 Fastlock with Spurious Optimization ...................................... 20 Typical Performance Characteristics ............................................. 9 Spur Mechanisms ....................................................................... 20 Circuit Description ......................................................................... 10 Spur Consistency ........................................................................ 21 Reference Input Section ............................................................. 10 Phase Resync ............................................................................... 21 RF Input Stage ............................................................................. 10 Filter DesignADIsimPLL....................................................... 21 RF INT Divider ........................................................................... 10 Interfacing ................................................................................... 21 INT, FRAC, MOD, and R Relationship ................................... 10 PCB Design Guidelines for Chip Scale Package .................... 22 RF R Counter .............................................................................. 10 Applications Information .............................................................. 23 Phase Frequency Detector (PFD) and Charge Pump ............ 11 Local Oscillator for a GSM Base Station Transmitter ........... 23 MUXOUT and Lock Detect ...................................................... 11 Outline Dimensions ....................................................................... 24 Input Shift Registers ................................................................... 11 Ordering Guide .......................................................................... 25 Program Modes .......................................................................... 11 Automotive Products ................................................................. 25 N Divider Register, R0 ............................................................... 17 Rev. G Page 2 of 25