Dual, 35 dB Range, 1 dB Step Size DGA Data Sheet ADL5205 FEATURES FUNCTIONAL BLOCK DIAGRAM SIDE A Dual, independent, digitally controlled gain amplifier (DGA) SPI WITH FA, PARALLEL WITH LATCH, 9 dB to +26 dB gain range UP/DOWN PWUPA VPOS 1 dB step size, 0.2 dB accuracy at 200 MHz 100 differential input resistance LOGIC 10 differential output resistance 1.2 dB change in noise figure for first 12 dB of gain reduction VINA+ 14dB VOUTA 0dB TO 23dB Output third-order intercept (OIP3): 48.5 dBm at 200 MHz, 5 V, TO 100 10 26dB VOUTA+ VINA high performance mode 3 dB bandwidth: 1700 MHz typical in high performance MODE0 mode CONTROL MODE1 Multiple control interface options CIRCUITRY PM Parallel 6-bit control interface with latch Serial peripheral interface (SPI) with fast attack Gain step up/down interface VINB+ 14dB VOUTB 0dB TO 23dB TO 100 10 Wide input dynamic range 26dB VINB VOUTB+ Low power mode LOGIC Power-down control ADL5205 Single 3.3 V or 5 V supply operation 40-lead, 6 mm 6 mm LFCSP package PWUPB GND SIDE B SPI WITH FA, PARALLEL WITH LATCH, APPLICATIONS UP/DOWN Differential analog-to-digital converter (ADC) drivers Figure 1. High intermediate frequency (IF) sampling receivers High output power IF amplification Instrumentation GENERAL DESCRIPTION The ADL5205 is a digitally controlled, wide bandwidth, variable low power mode. When disabled, the ADL5205 consumes only gain dual amplifier (DGA) that provides precise gain control, high 14 mA and offers excellent input to output isolation. The gain output third-order intercept (OIP3) and a near constant noise setting is preserved when the device is disabled. figure for the first 12 dB of attenuation. The excellent OIP3 Fabricated on the Analog Devices, Inc., high speed, silicon performance of 48.5 dBm (at 200 MHz, 5 V, high performance germanium (SiGe) complementary BiCMOS process, the mode, and maximum gain) makes the ADL5205 an excellent ADL5205 provides precise gain adjustment capabilities with good gain control device for a variety of receiver applications. distortion performance. The ADL5205 amplifier comes in a For wide input dynamic range applications, the ADL5205 compact, thermally enhanced, 6 mm 6 mm, 40-lead LFCSP package and operates over the temperature range of 40C to provides a broad 35 dB gain range with a 1 dB step size. The gain is adjustable through multiple gain control and interface +85C. options: parallel, SPI, or gain step up/down control. Note that throughout this data sheet, multifunction pins, such The two channels of the ADL5205 can be powered up as CSA/A3, are referred to by the entire pin name or by a single independently by applying the appropriate logic level to the function of the pin, for example, , when only that function CSA PWUPA and PWUPB pins. The quiescent current of the ADL5205 is relevant. is typically 175 mA for high performance mode and 135 mA for Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20162019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 13488-001ADL5205 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 SPI Read ....................................................................................... 20 Applications ....................................................................................... 1 ADC Interfacing ......................................................................... 21 Functional Block Diagram .............................................................. 1 Noise Figure vs. Gain Setting .................................................... 21 General Description ......................................................................... 1 Evaluation Board ............................................................................ 22 Revision History ............................................................................... 2 Overview ..................................................................................... 22 Specif icat ions ..................................................................................... 3 Power Supply Interface .............................................................. 22 Timing Specifications .................................................................. 5 Signal Inputs and Outputs......................................................... 23 Absolute Maximum Ratings ............................................................ 6 Manual Controls ......................................................................... 23 Thermal Resistance ...................................................................... 6 Parallel Interface ......................................................................... 24 Junction to Board Thermal Impedance ..................................... 6 Serial Interface ............................................................................ 24 ESD Caution .................................................................................. 6 Standard Development Platform (SDP) Interface ................. 25 Pin Configuration and Function Descriptions ............................. 7 Evaluation Board Control Software ......................................... 25 Typical Performance Characteristics ............................................. 9 Command Line Control Program............................................ 25 Theory of Operation ...................................................................... 17 Graphical User Interface (GUI) Program ............................... 25 Basic Structure ............................................................................ 17 Evaluation Board Schematics and Layout ................................... 27 Control/Logic Circuitry ............................................................. 17 Bill of Materials ........................................................................... 30 Common-Mode Voltage ............................................................ 17 Outline Dimensions ....................................................................... 31 Applications Information .............................................................. 18 Ordering Guide .......................................................................... 31 Basic Connections ...................................................................... 18 Digital Interface Overview ........................................................ 19 REVISION HISTORY 5/2019Rev. 0 to Rev. A Changes to Table 1 ............................................................................ 4 Changes to Table 3 ............................................................................ 6 4/2016Revision 0: Initial Version Rev. A Page 2 of 31