100 MHz to 4000 MHz RF/IF Digitally Controlled VGA Data Sheet ADL5243 FEATURES GENERAL DESCRIPTION Operating frequency from 100 MHz to 4000 MHz The ADL5243 is a high performance, digitally controlled Digitally controlled VGA with serial and parallel interfaces variable gain amplifier operating from 100 MHz to 4000 MHz. 6-bit, 0.5 dB digital step attenuator The VGA integrates two high performance amplifiers and a 31.5 dB gain control range with 0.25 dB step accuracy digital step attenuator (DSA). Amplifier 1 (AMP1) is an Gain Block Amplifier 1 internally matched gain block amplifier with 20 dB gain, and Gain: 19.2 dB at 2140 MHz Amplifier 2 (AMP2) is a broadband W driver amplifier that OIP3: 40.2 dBm at 2140 MHz requires very few external tuning components. The DSA is 6-bit P1dB: 19.8 dBm at 2140 MHz with a 31.5 dB gain control range, 0.5 dB steps, and 0.25 dB Noise figure: 2.9 dB at 2140 MHz step accuracy. The attenuation of the DSA can be controlled W Driver Amplifier 2 using a serial or parallel interface. Gain: 14.2 dB at 2140 MHz The gain block and DSA are internally matched to 50 at their OIP3: 41.1 dBm at 2140 MHz inputs and outputs, and all three internal devices are separately P1dB: 26.0 dBm at 2140 MHz biased. The separate bias allows all or part of the ADL5243 to be Noise figure: 3.7 dB at 2140 MHz used, which allows for easy reuse throughout a design. The Gain block, DSA, or W driver amplifier can be first pinout of the ADL5243 also enables the gain block, DSA, or Low quiescent current of 175 mA W driver amplifier to be first, giving the VGA maximum The companion ADL5240 integrates a gain block with DSA flexibility in a signal chain. APPLICATIONS The ADL5243 consumes 175 mA and operates off a single Wireless infrastructure supply ranging from 4.75 V to 5.25 V. The VGA is packaged in a Automated test equipment thermally efficient, 5 mm 5 mm, 32-lead LFCSP and is fully RF/IF gain control specified for operation from 40C to +85C. A fully populated evaluation board is available. FUNCTIONAL BLOCK DIAGRAM 32 31 30 29 28 27 26 25 VDD 1 24 VDD SERIAL/PARALLEL INTERFACE NC 2 23 NC NC 3 22 NC DSAIN 4 21 DSAOUT 0.5dB 1dB 2dB 4dB 8dB 16dB NC 5 20 NC ADL5243 6 19 AMP1OUT/VCC AMP2IN NC 7 AMP2 18 NC AMP1 NC 8 17 NC 9 10 11 12 13 14 15 16 Figure 1. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 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NC SEL AMP1IN D0/CLK NC D1/DATA NC D2/LE NC D3 NC D4 AMP2OUT/VCC2 D5 VBIAS D6 09431-001ADL5243 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Basic Layout Connections ......................................................... 22 Applications ....................................................................................... 1 SPI Timing................................................................................... 23 General Description ......................................................................... 1 ADL5243 Amplifier 2 Matching .............................................. 25 Functional Block Diagram .............................................................. 1 ADL5243 Loop Performance .................................................... 31 Revision History ............................................................................... 2 Proper Driving Level for the Optimum ACLR ...................... 32 Specif icat ions ..................................................................................... 3 Thermal Considerations ............................................................ 32 Absolute Maximum Ratings .......................................................... 10 Soldering Information and Recommended PCB Land Pattern ....................................................................................................... 32 ESD Caution ................................................................................ 10 Evaluation Board ............................................................................ 33 Pin Configuration and Function Descriptions ........................... 11 Outline Dimensions ....................................................................... 38 Typical Performance Characteristics ........................................... 12 Ordering Guide .......................................................................... 38 Applications Information .............................................................. 22 REVISION HISTORY 8/12Rev. A to Rev. B Changes to ADL5243 Loop Performance Section Added Figure 71, Figure 72, and Table 10, Renumbered Sequentially ....... 31 Changes to General Description Section ....................................... 1 Added Proper Driving Level for the Optimum ACLR Section Changes to Table 1 ............................................................................. 3 and Figure 73 .................................................................................... 32 Changes to Table 3 ........................................................................... 11 Changes to Evaluation Board Section and Table 11 ................... 33 Changes to Figure 3 ......................................................................... 12 Changes to Figure 75 ....................................................................... 34 Changes to Figure 33 ....................................................................... 17 Added Figure 76 .............................................................................. 35 Added Figure 47 and Figure 49, Renumbered Sequentially ...... 19 Changes to Figure 77 and Figure 78.............................................. 36 Change to Figure 58 ........................................................................ 22 Added Figure 79 .............................................................................. 37 Changes to ADL5243 Amplifier 2 Matching Section, Table 8, and Table 9 ........................................................................................ 25 8/11Rev. 0 to Rev. A Added Figure 61 and Figure 62...................................................... 26 Changes to Features Section ............................................................ 1 Changes to Figure 63 and Figure 64 .............................................. 27 7/11Revision 0: Initial Version Added Figure 65 Changes to Figure 66........................................ 28 Added Figure 67 Changes to Figure 68........................................ 29 Added Figure 69 ............................................................................... 30 Rev. B Page 2 of 40