2200 MHz to 2700 MHz, Dual-Balanced Mixer, LO Buffer, IF Amplifier, and RF Balun Data Sheet ADL5354 FEATURES FUNCTIONAL BLOCK DIAGRAM RF frequency range of 2200 MHz to 2700 MHz IF frequency range of 30 MHz to 450 MHz Power conversion gain: 8.6 dB 1 27 MNIN LOI2 SSB noise figure of 10.6 dB Input IP3 of 26.1 dBm 2 26 MNCT VGS2 Input P1dB of 10.6 dBm Typical LO power of 0 dBm COMM 3 25 VGS1 Single-ended, 50 RF and LO input ports VPOS 4 24 VGS0 High isolation SPDT LO input switch Single-supply operation: 3.3 V to 5 V 5 23 COMM LOSW Exposed paddle, 6 mm 6 mm, 36-lead LFCSP 6 22 VPOS PWDN 1500 V HBM/500 V FICDM ESD performance 7 21 COMM VPOS APPLICATIONS ADL5354 Cellular base station receivers 8 20 DVCT COMM Transmit observation receivers 9 19 DVIN LOI1 Radio link downconverters Figure 1. commensurate with the desired level of performance. For low GENERAL DESCRIPTION voltage applications, the ADL5354 is capable of operation at The ADL5354 uses a highly linear, doubly balanced, passive mixer voltages as low as 3.3 V with substantially reduced current. For core along with integrated RF and local oscillator (LO) balancing low voltage operation, an additional logic pin is provided to circuitry to allow single-ended operation. The ADL5354 incor- power down (approximately 300 A) the circuit when desired. porates the RF baluns, allowing for optimal performance over a The ADL5354 is fabricated using a BiCMOS high performance 2200 MHz to 2700 MHz RF input frequency range. The balanced IC process. The device is available in a 6 mm 6 mm, 36-lead passive mixer arrangement provides good LO-to-RF leakage, LFCSP and operates over a 40C to +85C temperature range. typically better than 37 dBm, and excellent intermodulation An evaluation board is also available. performance. The balanced mixer core also provides extremely high input linearity, allowing the device to be used in demanding Table 1. Passive Mixers cellular applications where in-band blocking signals may other- RF Frequency Single Single Mixer Dual Mixer wise result in the degradation of dynamic performance. A high (MHz) Mixer and IF Amp and IF Amp linearity IF buffer amplifier follows the passive mixer core to yield 500 to 1700 ADL5367 ADL5357 ADL5358 a typical power conversion gain of 8 dB and can be used with a 1200 to 2500 ADL5365 ADL5355 ADL5356 wide range of output impedances. 2200 to 2700 ADL5353 ADL5354 The ADL5354 provides two switched LO paths that can be used in time division duplex (TDD) applications where it is desirable to ping-pong between two local oscillators. LO current can be externally set using a resistor to minimize dc current Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. 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VPOS VPOS MNGM DVGM COMM COMM MNON DVOP MNOP DVON MNLE DVLE VPOS VPOS MNLG DVLG NIC NIC 10 36 11 35 12 34 13 33 14 32 15 31 16 30 17 29 18 28 09118-001ADL5354 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Spur Tables ...................................................................................... 15 Applications ....................................................................................... 1 5 V Performance ......................................................................... 15 Functional Block Diagram .............................................................. 1 3.3 V Performance ...................................................................... 15 General Description ......................................................................... 1 Circuit Description......................................................................... 16 Revision History ............................................................................... 2 RF Subsystem .............................................................................. 16 Specifications ..................................................................................... 3 LO Subsystem ............................................................................. 16 5 V Performance ........................................................................... 4 Applications Information .............................................................. 18 3.3 V Performance ........................................................................ 4 Basic Connections ...................................................................... 18 Absolute Maximum Ratings ............................................................ 5 IF Port .......................................................................................... 18 ESD Caution .................................................................................. 5 Bias Resistor Selection ............................................................... 18 Pin Configuration and Function Descriptions ............................. 6 Mixer VGS Control DAC .......................................................... 18 Typical Performance Characteristics ............................................. 7 Evaluation Board ............................................................................ 20 5 V Performance ........................................................................... 7 Outline Dimensions ....................................................................... 22 3.3 V Performance ...................................................................... 14 Ordering Guide .......................................................................... 22 REVISION HISTORY 1/16Rev. 0 to Rev. A Changes to Figure 2 and Table 6 ..................................................... 6 Updated Outline Dimensions ....................................................... 22 Changes to Ordering Guide .......................................................... 22 2/11Revision 0: Initial Version Rev. A Page 2 of 24