500 MHz to 1700 MHz Balanced Mixer, LO Buffer, IF Amplifier, and RF Balun Data Sheet ADL5357 FEATURES FUNCTIONAL BLOCK DIAGRAM IFGM IFOP IFON PWDN LEXT RF frequency range of 500 MHz to 1700 MHz 20 19 18 17 16 IF frequency range of 30 MHz to 450 MHz Power conversion gain: 8.6 dB ADL5357 VPIF 1 15 LOI2 SSB noise figure of 9.1 dB SSB noise figure with 5 dBm blocker of 19.5 dB Input IP3 of 26.6 dBm RFIN 2 14 VPSW Input P1dB of 10.2 dBm Typical LO drive of 0 dBm Single-ended, 50 RF and LO input ports 3 13 RFCT VGS1 High isolation SPDT LO input switch BIAS Single-supply operation: 3.3 V to 5 V GENERATOR Exposed paddle 5 mm 5 mm, 20-lead LFCSP COMM 4 12 VGS0 1500 V HBM/500 V FICDM ESD performance 5 11 COMM LOI1 APPLICATIONS 6 7 8 9 10 Cellular base station receivers VLO3 LGM3 VLO2 LOSW NC Transmit observation receivers NC = NO CONNECT Radio link downconverters Figure 1. The ADL5357 provides two switched LO paths that can be GENERAL DESCRIPTION used in TDD applications where it is desirable to rapidly switch The ADL5357 uses a highly linear, doubly balanced passive between two local oscillators. LO current can be externally set mixer core along with integrated RF and LO balancing circuitry using a resistor to minimize dc current commensurate with the to allow for single-ended operation. The ADL5357 incorporates desired level of performance. For low voltage applications, the an RF balun, allowing for optimal performance over a 500 MHz to ADL5357 is capable of operation at voltages down to 3.3 V with 1700 MHz RF input frequency range using high-side LO injection substantially reduced current. Under low voltage operation, an for RF frequencies from 500 MHz to 1200 MHz and low-side additional logic pin is provided to power down (<200 A) the injection for frequencies from 900 MHz to 1700 MHz. The circuit when desired. balanced passive mixer arrangement provides good LO-to-RF The ADL5357 is fabricated using a BiCMOS high performance leakage, typically better than 46 dBm, and excellent inter- IC process. The device is available in a 5 mm 5 mm, 20-lead modulation performance. The balanced mixer core also provides LFCSP and operates over a 40C to +85C temperature range. extremely high input linearity, allowing the device to be used in An evaluation board is also available. demanding cellular applications where in-band blocking signals may otherwise result in the degradation of dynamic performance. Table 1. Passive Mixers A high linearity IF buffer amplifier follows the passive mixer core Single Single Mixer Dual Mixer to yield a typical power conversion gain of 8.6 dB and can be used RF Frequency (MHz) Mixer and IF Amp and IF Amp with a wide range of output impedances. 500 to 1700 ADL5367 ADL5357 ADL5358 1200 to 2500 ADL5365 ADL5355 ADL5356 2300 to 2900 ADL5363 ADL5353 ADL5354 Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20092015 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 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Technical Support www.analog.com 08081-001ADL5357 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 3.3 V Performance ...................................................................... 14 Applications ....................................................................................... 1 Spur Tables .................................................................................. 15 General Description ......................................................................... 1 Circuit Description......................................................................... 16 Functional Block Diagram .............................................................. 1 RF Subsystem .............................................................................. 16 Revision History ............................................................................... 2 LO Subsystem ............................................................................. 17 Specifications ..................................................................................... 3 Applications Information .............................................................. 18 5 V Performance ........................................................................... 4 Basic Connections ...................................................................... 18 3.3 V Performance ........................................................................ 4 IF Port .......................................................................................... 18 Absolute Maximum Ratings ............................................................ 5 Bias Resistor Selection ............................................................... 18 ESD Caution .................................................................................. 5 Mixer VGS Control DAC .......................................................... 18 Pin Configuration and Function Descriptions ............................. 6 Evaluation Board ............................................................................ 20 Typical Performance Characteristics ............................................. 7 Outline Dimensions ....................................................................... 23 5 V Performance ........................................................................... 7 Ordering Guide .......................................................................... 23 REVISION HISTORY 2/15Rev. 0 to Rev. A Changes to Table 1 ............................................................................ 1 Changes to Figure 2 .......................................................................... 6 Deleted R9 = 1.1 k, 5 V Performance Section ........................... 7 Deleted Figure 41 Renumbered Sequentially............................. 13 Changes to Figure 42 ...................................................................... 13 Changes to Figure 52 ...................................................................... 20 Changes to Table 9 .......................................................................... 21 Updated Outline Dimensions ....................................................... 23 Changes to Ordering Guide .......................................................... 23 7/09Revision 0: Initial Version Rev. A Page 2 of 23