500 MHz to 1700 MHz, Dual-Balanced Mixer, LO Buffer, IF Amplifier, and RF Balun Data Sheet ADL5358 FEATURES FUNCTIONAL BLOCK DIAGRAM RF frequency range of 500 MHz to 1700 MHz IF frequency range of 30 MHz to 450 MHz Power conversion gain: 8.3 dB LOI2 MNIN SSB noise figure of 9.9 dB SSB noise figure with 5 dBm blocker of 23 dB VGS2 MNCT Input IP3 of 25.2 dBm VGS1 Input P1dB of 10.6 dBm COMM Typical LO drive of 0 dBm VGS0 VPOS Single-ended, 50 RF and LO input ports High isolation SPDT LO input switch LOSW COMM Single-supply operation: 3.3 V to 5 V PWDN VPOS Exposed paddle, 6 mm 6 mm, 36-lead LFCSP VPOS COMM APPLICATIONS ADL5358 Cellular base station receivers DVCT COMM Transmit observation receivers DVIN LOI1 Radio link downconverters NOTES 1. NIC = NO INTERNAL CONNECTION. Figure 1. The ADL5358 provides two switched LO paths that can be used GENERAL DESCRIPTION in TDD applications where it is desirable to ping-pong between The ADL5358 uses a highly linear, doubly balanced, passive two local oscillators. LO current can be externally set using a mixer core along with integrated RF and local oscillator (LO) resistor to minimize dc current commensurate with the desired balancing circuitry to allow single-ended operation. The level of performance. For low voltage applications, the ADL5358 is ADL5358 incorporates the RF baluns, allowing for optimal capable of operation at voltages down to 3.3 V with substantially performance over a 500 MHz to 1700 MHz RF input frequency reduced current. Under low voltage operation, an additional logic range. Performance is optimized for RF frequencies from 500 MHz pin is provided to power down (<300 A) the circuit when desired. to 1200 MHz using a high-side LO and RF frequencies from The ADL5358 is fabricated using a BiCMOS high performance 1200 MHz to 1700 MHz using a low-side LO. The balanced IC process. The device is available in a 6 mm 6 mm, 36-lead passive mixer arrangement provides good LO-to-RF leakage, LFCSP and operates over a 40C to +85C temperature range. typically better than 20 dBm, and excellent intermodulation An evaluation board is also available. performance. The balanced mixer core also provides extremely high input linearity, allowing the device to be used in demanding Table 1. Passive Mixers cellular applications where in-band blocking signals may otherwise RF Frequency Single Single Mixer Dual Mixer result in the degradation of dynamic performance. A high linearity (MHz) Mixer and IF Amp and IF Amp IF buffer amplifier follows the passive mixer core to yield a 500 to 1700 ADL5367 ADL5357 ADL5358 typical power conversion gain of 8.3 dB and can be used with 1200 to 2500 ADL5365 ADL5355 ADL5356 a wide range of output impedances. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20092016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. VPOS VPOS MNGM DVGM COMM COMM MNON DVOP MNOP DVON MNLE DVLE VPOS VPOS MNLG DVLG NIC NIC 07885-001ADL5358 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 3.3 V Performance ...................................................................... 15 Applications ....................................................................................... 1 Spurious Performance ............................................................... 16 General Description ......................................................................... 1 Circuit Description......................................................................... 17 Functional Block Diagram .............................................................. 1 RF Subsystem .............................................................................. 17 Revision History ............................................................................... 2 LO Subsystem ............................................................................. 18 Specifications ..................................................................................... 3 Applications Information .............................................................. 19 5 V Performance ........................................................................... 4 Basic Connections ...................................................................... 19 3.3 V Performance ........................................................................ 4 IF Port .......................................................................................... 19 Absolute Maximum Ratings ............................................................ 5 Bias Resistor Selection ............................................................... 19 ESD Caution .................................................................................. 5 Mixer VGS Control DAC .......................................................... 19 Pin Configuration and Function Descriptions ............................. 6 Evaluation Board ............................................................................ 21 Typical Performance Characteristics ............................................. 7 Outline Dimensions ....................................................................... 23 5 V Performance ........................................................................... 7 Ordering Guide .......................................................................... 23 REVISION HISTORY 3/16Rev. 0 to Rev. A Changes to Figure 1 .......................................................................... 1 Changes to Figure 2 and Table 6 ..................................................... 6 Changes to Figure 52 ...................................................................... 17 Changes to Figure 54 ...................................................................... 21 Updated Outline Dimensions ....................................................... 23 Changes to Ordering Guide .......................................................... 23 11/09Revision 0: Initial Version Rev. A Page 2 of 24