700 MHz to 2.7 GHz
Quadrature Demodulator
Data Sheet
ADL5382
FEATURES FUNCTIONAL BLOCK DIAGRAM
CMRF CMRF RFIP RFIN CMRF VPX
Operating RF and LO frequency: 700 MHz to 2.7 GHz
24 23 22 21 20 19
Input IP3
33.5 dBm @ 900 MHz
1 18
VPA ADL5382 VPB
30.5 dBm @1900 MHz
BIAS
COM 2 17 VPB
GEN
Input IP2: >70 dBm @ 900 MHz
Input P1dB: 14.7 dBm @ 900 MHz
BIAS 3 16 QHI
Noise figure (NF)
0
14.0 dB @ 900 MHz
VPL 4 15 QLO
90
15.6 dB @ 1900 MHz
VPL 5 14 IHI
Voltage conversion gain: ~4 dB
Quadrature demodulation accuracy
VPL 6 13 ILO
Phase accuracy: ~0.2
Amplitude balance: ~0.05 dB
7 8 9 10 11 12
Demodulation bandwidth: ~370 MHz CML LOIP LOIN CML CML COM
Baseband I/Q drive: 2 V p-p into 200 Figure 1.
Single 5 V supply
APPLICATIONS
Cellular W-CDMA/CDMA/CDMA2000/GSM
Microwave point-to-(multi)point radios
Broadband wireless and WiMAX
GENERAL DESCRIPTION
The ADL5382 is a broadband quadrature I-Q demodulator that The fully balanced design minimizes effects from second-order
covers an RF input frequency range from 700 MHz to 2.7 GHz. distortion. The leakage from the LO port to the RF port is
With a NF = 14 dB, IP1dB = 14.7 dBm, and IIP3 = 33.5 dBm at <65 dBc. Differential dc offsets at the I and Q outputs are typically
900 MHz, the ADL5382 demodulator offers outstanding dynamic <10 mV. Both of these factors contribute to the excellent IIP2
range suitable for the demanding infrastructure direct-conversion specifications which is >60 dBm.
requirements. The differential RF inputs provide a well-behaved
The ADL5382 operates off a single 4.75 V to 5.25 V supply. The
broadband input impedance of 50 and are best driven from a
supply current is adjustable with an external resistor from the
1:1 balun for optimum performance.
BIAS pin to ground.
Excellent demodulation accuracy is achieved with amplitude and
The ADL5382 is fabricated using the Analog Devices, Inc.,
phase balances ~0.05 dB and ~0.2, respectively. The demodulated
advanced Silicon-Germanium bipolar process and is available
in-phase (I) and quadrature (Q) differential outputs are fully
in a 24-lead exposed paddle LFCSP.
buffered and provide a voltage conversion gain of ~4 dB. The
buffered baseband outputs are capable of driving a 2 V p-p
differential signal into 200 .
Rev. A
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07208-001ADL5382* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS REFERENCE MATERIALS
View a parametric search of comparable parts. Product Selection Guide
RF Source Booklet
EVALUATION KITS
Technical Articles
ADL5382 Evaluation Board
Assess Quadrature-Demodulator Noise Figure Using
Vector Signal Analysis
DOCUMENTATION
Direct Conversion Receiver Designs Enable Multi-
standard/Multi-band Operation
Application Notes
Semiconductors Simplify Direct-Conversion Design
AN-1236: Interfacing the ADL5382 Quadrature I/Q
Demodulator to the AD9262 16-Bit Continuous Time
Sigma-Delta ADC as an RF-to-Bits Solution
DESIGN RESOURCES
Data Sheet
ADL5382 Material Declaration
ADL5382: 700 MHz to 2.7 GHz Quadrature Demodulator
PCN-PDN Information
Datasheet
Quality And Reliability
User Guides
Symbols and Footprints
UG-093: Evaluation Board User Guide for the Dual,
Continuous Time Sigma-Delta Modulator
DISCUSSIONS
View all ADL5382 EngineerZone Discussions.
TOOLS AND SIMULATIONS
ADIsimPLL
SAMPLE AND BUY
ADIsimRF
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