4.5 GHz Ultrahigh Dynamic Range, Dual Differential Amplifier Data Sheet ADL5566 FEATURES FUNCTIONAL BLOCK DIAGRAM VCC1/VCC2 ENBL1 3 dB bandwidth of 4.5 GHz (A = 16 dB) V Fixed 16 dB gain R F Channel-to-channel gain error: 0.1 dB at 100 MHz Channel-to-channel phase error: 0.06 at 100 MHz VON1 Differential or single-ended input to differential output I/O dc-coupled or ac-coupled R G Low noise input stage: 1.3 nV/Hz RTI at A = 16 dB V VIP1 VCOM1 R G Low broadband distortion (A = 16 dB), supply = 5 V V VIN1 10 MHz: 103 dBc (HD2), 107 dBc (HD3) 100 MHz: 95 dBc (HD2), 100 dBc (HD3) VOP1 200 MHz: 94.5 dBc (HD2), 87 dBc (HD3) 500 MHz: 83 dBc (HD2), 64 dBc (HD3) R F IMD3 of 95 dBc at 200 MHz center R Maintains low single-ended distortion performance out to F 500 MHz Slew rate: 16 V/ns VON2 Maintains low distortion down to 1.2 V VCOM R Fixed 16 dB gain can be reduced by adding external resistors G VIP2 VCOM2 Fast settling and overdrive recovery of 2.5 ns R G VIN2 Single-supply operation: 2.8 V to 5.2 V Power-down Low dc power consumption, 462 mW at 3.3 V supply VOP2 R APPLICATIONS F Differential ADC drivers ADL5566 Single-ended to differential conversion GND ENBL2 RF/IF gain blocks Figure 1. SAW filter interfacing GENERAL DESCRIPTION The ADL5566 is a high performance, dual differential amplifier The quiescent current of the ADL5566, using a 3.3 V supply, is optimized for IF and dc applications. The amplifier offers low typically 70 mA per amplifier. When disabled, it consumes less noise of 1.3 nV/Hz and excellent distortion performance over than 3.5 mA per amplifier and has 25 dB of input to output a wide frequency range, making it an ideal driver for high speed isolation at 100 MHz. 16-bit analog-to-digital converters (ADCs). The ADL5566 is The device is optimized for wideband, low distortion, and noise ideally suited for use in high performance, zero IF/complex performance, giving it unprecedented performance for overall IF receiver designs. In addition, this device has excellent low spurious-free dynamic range (SFDR). These attributes, together distortion for single-ended input drive applications. with the adjustable gain capability, make this device the amplifier of The ADL5566 provides a gain of 16 dB. For the single-ended input choice for driving a wide variety of ADCs, mixers, pin diode configuration, the gain is reduced to 14 dB. Using two external attenuators, SAW filters, and multi-element discrete devices. series resistors for each amplifier expands the gain flexibility of Fabricated on an Analog Devices, Inc., high speed SiGe process, the the amplifier and allows for any gain selection from 0 dB to 16 dB ADL5566 is supplied in a compact 4 mm 4 mm, 24-lead LFCSP for a differential input and 0 dB to 14 dB for a single-ended input. package and operates over the 40C to +85C temperature range. In addition, this device maintains low distortion down to output (VOCM) levels of 1.2 V providing an added capability for driving CMOS ADCs at ac levels up to 2 V p-p. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20122019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 10916-001ADL5566 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Applications Information .............................................................. 15 Applications ....................................................................................... 1 Basic Connections ...................................................................... 15 Functional Block Diagram .............................................................. 1 Input and Output Interfacing ................................................... 16 General Description ......................................................................... 1 Gain Adjustment and Interfacing ............................................ 16 Revision History ............................................................................... 2 ADC Interfacing ......................................................................... 18 Specif icat ions ..................................................................................... 3 DC-Coupled Receiver Application .......................................... 18 Absolute Maximum Ratings ............................................................ 6 Layout Considerations ............................................................... 19 Thermal Resistance ...................................................................... 6 Soldering Information and Recommended Land Pattern .... 21 ESD Caution .................................................................................. 6 Evaluation Board ........................................................................ 21 Pin Configuration and Function Descriptions ............................. 7 Outline Dimensions ....................................................................... 24 Typical Performance Characteristics ............................................. 8 Ordering Guide .......................................................................... 24 Circuit Description ......................................................................... 14 REVISION HISTORY 8/2019Rev. B to Rev. C 12/2013Rev. 0 to Rev. A Changes to Figure 36 ...................................................................... 15 Changes to ENBL1/ENBL2 Threshold Parameter, Table 1 .......... 3 Changes to Figure 48 ...................................................................... 19 Change to Table 2 .............................................................................. 6 Updated Outline Dimensions ....................................................... 24 Changes to Ordering Guide .......................................................... 24 11/2012Revision 0: Initial Version 4/2019Rev. A to Rev. B Changes to Figure 26 ...................................................................... 11 Updated Outline Dimensions ....................................................... 24 Rev. C Page 2 of 24