High IP3, 10 MHz to 6 GHz, Active Mixer Data Sheet ADL5801 FEATURES FUNCTIONAL BLOCK DIAGRAM VPLO GND NC IFON IFOP GND Broadband upconverter/downconverter 24 23 22 21 20 19 Power conversion gain of 1.8 dB Broadband RF, LO, and IF ports GND 1 18 VPRF ADL5801 SSB noise figure (NF) of 9.75 dB GND 2 17 GND Input IP3: 28.5 dBm Input P1dB: 13.3 dBm 3 16 LOIP RFIP Typical LO drive: 0 dBm V2I LOIN 4 RFIN 15 Single-supply operation: 5 V at 130 mA Adjustable bias for low power operation GND 5 14 GND Exposed paddle, 4 mm 4 mm, 24-lead LFCSP package GND 6 13 VPDT BIAS DET APPLICATIONS 7 8 9 10 11 12 Cellular base station receivers VPLO GND ENBL VSET DETO GND Radio link downconverters Figure 1. Broadband block conversion Instrumentation GENERAL DESCRIPTION The ADL5801 uses a high linearity, doubly balanced, active The balanced active mixer arrangement provides superb LO-to- mixer core with integrated LO buffer amplifier to provide high RF and LO-to-IF leakage, typically better than 40 dBm. The IF dynamic range frequency conversion from 10 MHz to 6 GHz. outputs are designed to provide a typical voltage conversion The mixer benefits from a proprietary linearization architecture gain of 7.8 dB when loaded into a 200 load. The broad that provides enhanced input IP3 performance when subject to frequency range of the open-collector IF outputs allows the high input levels. A bias adjust feature allows the input linearity, ADL5801 to be applied as an upconverter for various transmit SSB noise figure, and dc current to be optimized using a single applications. control pin. An optional input power detector is provided for The ADL5801 is fabricated using a SiGe high performance IC adaptive bias control. The high input linearity allows the device process. The device is available in a compact 4 mm 4 mm, to be used in demanding cellular applications where in-band 24-lead LFCSP package and operates over a 40C to +85C blocking signals may otherwise result in degradation in dynamic temperature range. An evaluation board is also available. performance. The adaptive bias feature allows the part to provide high input IP3 performance when presented with large blocking signals. When blockers are removed, the ADL5801 can automatically bias down to provide low noise figure and low power consumption. Rev. F Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 20102020 Analog Devices, Inc. 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Trademarks and registered trademarks are the property of their respective owners. 08079-001ADL5801 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Circuit Description ........................................................................ 27 Applications ...................................................................................... 1 LO Amplifier and Splitter ......................................................... 27 Functional Block Diagram .............................................................. 1 RF Voltage-to-Current (V-to-I) Converter ............................ 27 General Description ......................................................................... 1 Mixer Core .................................................................................. 27 Revision History ............................................................................... 2 Mixer Output Load .................................................................... 27 Specifications .................................................................................... 3 RF Detector ................................................................................. 28 Absolute Maximum Ratings ........................................................... 6 Bias Circuit .................................................................................. 28 ESD Caution.................................................................................. 6 Applications Information ............................................................. 31 Pin Configuration and Function Descriptions ............................ 7 Basic Connections ...................................................................... 31 Typical Performance Characteristics ............................................. 8 RF and LO Ports ......................................................................... 31 Downconverter Mode with a Broadband Balun ...................... 8 IF Port .......................................................................................... 32 Downconverter Mode with a Mini-Circuits TC1-1-43M+ Downconverting to Low Frequencies ..................................... 33 Input Balun ................................................................................. 12 Broadband Operation ................................................................ 34 Downconverter Mode with a Johanson 3.5 GHz Input Balun Single-Ended Drive of RF and LO Inputs .............................. 36 ....................................................................................................... 14 Performance Up to 8 GHz ........................................................ 37 Downconverter Mode with a Johanson 5.7 GHz Input Balun Evaluation Board ............................................................................ 38 ....................................................................................................... 16 Outline Dimensions ....................................................................... 40 Upconverter Mode with a 900 MHz Output Match ............. 18 Ordering Guide .......................................................................... 40 Upconverter Mode with a 2.1 GHz Output Match ............... 20 Spur Performance....................................................................... 23 REVISION HISTORY 10/2020Rev. E to Rev. F 7/2013Rev. A to Rev. B Changed CP-24-3 to CP-24-8 ...................................... Throughout Added Disable Voltage and Enable Voltage Table 1 ................... 3 Changes to Figure 1 .......................................................................... 1 Changes to Table 5 and Figure 96 ................................................ 31 Changes to Figure 2 .......................................................................... 7 Added Downconverting to Low Frequencies Section and Added Performance Up to 8 GHz Section and Table 9 Figure 97 Renumbered Sequentially ........................................... 32 Renumbered Sequentially ............................................................. 37 Added Broadband Operation Section and Figure 98 to Updated Outline Dimensions ....................................................... 40 Figure 101 ........................................................................................ 33 Changes to Ordering Guide .......................................................... 40 Added Single-Ended Drive of RF and LO Inputs Section and Figure 102 to Figure 105 ................................................................ 35 Updated Outline Dimensions ...................................................... 39 4/2014Rev. D to Rev. E 7/11Rev. 0 to Rev. A Changes to Figure 1 .......................................................................... 1 Changes to Table 1 ........................................................................... 4 Changes to Specifications Section ................................................... 3 Changes to Figure 87 and Deleted Table 4 Renumbered Changes to Typical Performance Characteristics Section ........... 8 Sequentially ..................................................................................... 27 Changes to Spur Performance Section ........................................ 23 Changes to RF Detector Section and Bias Circuit Section Changes to RF Voltage-to-Current (V-to-I) Converter Added Table 4 and Table 5 Renumbered Sequentially, and Section .............................................................................................. 27 Added Figure 92, Figure 93, Figure 94, and Figure 95 Changes to RF Detector Section................................................... 28 Renumbered Sequentially ............................................................. 29 Changes to RF and LO Ports Section .......................................... 30 3/2014Rev. C to Rev. D 2/2010Revision 0: Initial Version Changes to Pin 9, Table 3 ................................................................ 7 8/2013Rev. B to Rev. C Changes to Table 8 ......................................................................... 38 Rev. F Page 2 of 40