Super Sequencer and Monitor Data Sheet ADM1065 FEATURES FUNCTIONAL BLOCK DIAGRAM REFOUT REFGND SDA SCL A1 A0 Complete supervisory and sequencing solution for up to 10 supplies VREF SMBus 10 supply fault detectors enable supervision of supplies to INTERFACE ADM1065 <0.5% accuracy at all voltages at 25C EEPROM <1.0% accuracy across all voltages and temperatures 5 selectable input attenuators allow supervision of supplies to VX1 PDO1 CONFIGURABLE 14.4 V on VH DUAL- OUTPUT PDO2 VX2 FUNCTION DRIVERS 6 V on VP1 to VP4 (VPx) INPUTS PDO3 VX3 PDO4 (LOGIC INPUTS (HV CAPABLE OF 5 dual-function inputs, VX1 to VX5 (VXx) VX4 OR PDO5 DRIVING GATES SFDs) OF N-FET) High impedance input to supply fault detector with VX5 PDO6 SEQUENCING thresholds between 0.573 V and 1.375 V ENGINE VP1 PDO7 CONFIGURABLE General-purpose logic input PROGRAMMABLE OUTPUT VP2 RESET DRIVERS PDO8 10 programmable driver outputs, PDO1 to PDO10 (PDOx) VP3 GENERATORS (LV CAPABLE PDO9 VP4 Open-collector with external pull-up (SFDs) OF DRIVING LOGIC SIGNALS) VH PDO10 Push/pull output driven to VDDCAP or VPx AGND PDOGND Open collector with weak pull-up to VDDCAP or VPx VDD VDDCAP ARBITRATOR Internally charge-pumped high drive for use with external N-FET (PDO1 to PDO6 only) VCCP GND Sequencing engine (SE) implements state machine control of Figure 1. PDO outputs State changes conditional on input events Enables complex control of boards GENERAL DESCRIPTION Power-up and power-down sequence control The ADM1065 Super Sequencer is a configurable supervisory/ Fault event handling sequencing device that offers a single-chip solution for supply Interrupt generation on warnings monitoring and sequencing in multiple-supply systems. Watchdog function can be integrated in SE The device also provides up to 10 programmable inputs for moni- Program software control of sequencing through SMBus toring undervoltage faults, overvoltage faults, or out-of-window Device powered by the highest of VPx, VH for improved faults on up to 10 supplies. In addition, 10 programmable outputs redundancy can be used as logic enables. Six of these programmable outputs User EEPROM: 256 bytes can each provide up to a 12 V output for driving the gate of an Industry-standard 2-wire bus interface (SMBus) N-FET that can be placed in the path of a supply. Guaranteed PDO low with VH, VPx = 1.2 V Available in 40-lead, 6 mm 6 mm LFCSP and The logical core of the device is a sequencing engine. This state 48-lead, 7 mm 7 mm TQFP packages machine-based construction provides up to 63 different states. This design enables very flexible sequencing of the outputs APPLICATIONS based on the condition of the inputs. Central office systems The ADM1065 is controlled via configuration data that can be Servers/routers programmed into an EEPROM. The whole configuration can Multivoltage system line cards be programmed using an intuitive GUI-based software package DSP/FPGA supply sequencing provided by Analog Devices, Inc. In-circuit testing of margined supplies For more information about the ADM1065 register map, refer to the AN-698 Application Note at www.analog.com. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20042015 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 04634-001ADM1065 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Supply Sequencing Through Configurable Output Drivers...... 15 Applications ....................................................................................... 1 Default Output Configuration .................................................. 15 Functional Block Diagram .............................................................. 1 Sequencing Engine ......................................................................... 16 General Description ......................................................................... 1 Overview ..................................................................................... 16 Revision History ............................................................................... 3 Warnings...................................................................................... 16 Detailed Block Diagram .................................................................. 4 SMBus Jump (Unconditional Jump) ........................................ 16 Specifications ..................................................................................... 5 Sequencing Engine Application Example ............................... 17 Absolute Maximum Ratings ............................................................ 7 Fault and Status Reporting ........................................................ 18 Thermal Resistance ...................................................................... 7 Applications Diagram .................................................................... 19 ESD Caution .................................................................................. 7 Communicating with the ADM1065 ........................................... 20 Pin Configurations and Function Descriptions ........................... 8 Configuration Download at Power-Up ................................... 20 Typical Performance Characteristics ........................................... 10 Updating the Configuration ..................................................... 20 Powering the ADM1065 ................................................................ 12 Updating the Sequencing Engine ............................................. 21 Slew Rate Consideration ............................................................ 12 Internal Registers ........................................................................ 21 Inputs ................................................................................................ 13 EEPROM ..................................................................................... 21 Supply Supervision ..................................................................... 13 Serial Bus Interface..................................................................... 21 Programming the Supply Fault Detectors ............................... 13 SMBus Protocols for RAM and EEPROM .............................. 24 Input Comparator Hysteresis .................................................... 13 Write Operations ........................................................................ 24 Input Glitch Filtering ................................................................. 14 Read Operations ......................................................................... 26 Supply Supervision with VXx Inputs ....................................... 14 Outline Dimensions ....................................................................... 27 VXx Pins as Digital Inputs ........................................................ 14 Ordering Guide .......................................................................... 27 Outputs ............................................................................................ 15 Rev. E Page 2 of 28