Super Sequencer and Monitor Data Sheet ADM1068 FEATURES FUNCTIONAL BLOCK DIAGRAM REFOUT REFGND SDA SCL A1 A0 Complete supervisory and sequencing solution for up to 8 supplies VREF SMBus INTERFACE 8 supply fault detectors enable supervision of supplies to ADM1068 <0.5% accuracy at all voltages at 25C EEPROM <1.0% accuracy across all voltages and temperatures 4 selectable input attenuators allow supervision of supplies to PDO1 CONFIGURABLE DUAL- 14.4 V on VH VX1 PDO2 OUTPUT FUNCTION DRIVERS VX2 INPUTS PDO3 6 V on VP1 to VP3 (VPx) VX3 PDO4 (LOGIC INPUTS (HV CAPABLE OF 4 dual-function inputs, VX1 to VX4 (VXx) OR PDO5 DRIVING GATES VX4 SFDs) OF N-FET) PDO6 High impedance input to supply fault detector with SEQUENCING ENGINE thresholds between 0.573 V and 1.375 V CONFIGURABLE VP1 OUTPUT PROGRAMMABLE General-purpose logic input DRIVERS RESET PDO7 VP2 GENERATORS 8 programmable driver outputs, PDO1 to PDO8 (PDOx) (LV CAPABLE VP3 OF DRIVING PDO8 (SFDs) LOGIC SIGNALS) Open-collector with external pull-up VH Push/pull output, driven to VDDCAP or VPx AGND PDOGND Open collector with weak pull-up to VDDCAP or VPx VDD VDDCAP ARBITRATOR Internally charge-pumped high drive for use with external N-FET (PDO1 to PDO6 only) VCCP GND Sequencing engine (SE) implements state machine control of Figure 1. PDO outputs State changes conditional on input events Enables complex control of boards GENERAL DESCRIPTION Power-up and power-down sequence control The ADM1068 Super Sequencer is a configurable supervisory/ Fault event handling sequencing device that offers a single-chip solution for supply Interrupt generation on warnings monitoring and sequencing in multiple supply systems. Watchdog function can be integrated in SE Program software control of sequencing through SMBus The device also provides up to eight programmable inputs for Device powered by the highest of VPx, VH for improved monitoring undervoltage faults, overvoltage faults, or out-of- redundancy window faults on up to eight supplies. In addition, eight User EEPROM: 256 bytes programmable outputs can be used as logic enables. Six of these Industry-standard 2-wire bus interface (SMBus) programmable outputs can also provide up to a 12 V output for Guaranteed PDO low with VH, VPx = 1.2 V driving the gate of an N-FET that can be placed in the path of Available in 32-lead 7 mm 7 mm LQFP a supply. The logical core of the device is a sequencing engine. This state- APPLICATIONS machine-based construction provides up to 63 different states. Central office systems This design enables very flexible sequencing of the outputs, Servers/routers based on the condition of the inputs. Multivoltage system line cards The ADM1068 is controlled via configuration data that can be DSP/FPGA supply sequencing programmed into an EEPROM. The whole configuration can In-circuit testing of margined supplies be programmed using an intuitive GUI-based software package provided by Analog Devices, Inc. For more information about the ADM1068 register map, refer to the AN-721 Application Note. Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20052015 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 04734-001ADM1068 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Supply Sequencing Through Configurable Output Drivers ....... 13 Applications ....................................................................................... 1 Default Output Configuration .................................................. 13 Functional Block Diagram .............................................................. 1 Sequencing Engine ......................................................................... 14 General Description ......................................................................... 1 Overview ..................................................................................... 14 Revision History ............................................................................... 2 Warnings...................................................................................... 14 Detailed Block Diagram .................................................................. 3 SMBus Jump (Unconditional Jump) ........................................ 14 Specif icat ions ..................................................................................... 4 Sequencing Engine Application Example ............................... 15 Absolute Maximum Ratings ............................................................ 6 Fault and Status Reporting ........................................................ 16 Thermal Resistance ...................................................................... 6 Applications Diagram .................................................................... 17 ESD Caution .................................................................................. 6 Communicating with the ADM1068 ........................................... 18 Pin Configuration and Function Descriptions ............................. 7 Configuration Download at Power-Up ................................... 18 Typical Performance Characteristics ............................................. 8 Updating the Configuration ..................................................... 18 Powering the ADM1068 ................................................................ 10 Updating the Sequencing Engine ............................................. 19 Slew Rate Consideration ............................................................ 10 Internal Registers ........................................................................ 19 Inputs ................................................................................................ 11 EEPROM ..................................................................................... 19 Supply Supervision ..................................................................... 11 Serial Bus Interface ..................................................................... 19 Programming the Supply Fault Detectors ............................... 11 SMBus Protocols for RAM and EEPROM .............................. 22 Input Comparator Hysteresis .................................................... 11 Write Operations ........................................................................ 22 Input Glitch Filtering ................................................................. 12 Read Operations ......................................................................... 24 Supply Supervision with VXx Inputs ....................................... 12 Outline Dimensions ....................................................................... 25 VXx Pins as Digital Inputs ........................................................ 12 Ordering Guide .......................................................................... 25 Outputs ............................................................................................ 13 REVISION HISTORY 2/15Rev. C to Rev. D 7/06Rev. 0 to Rev. A Changes to Figure 3 and Table 4 ..................................................... 7 Changes to Features .......................................................................... 1 Added Slew Rate Consideration Section ..................................... 10 Changes to Table 1 ............................................................................. 4 Added SCL Held Low Timeout Section and False Start Changes to Table 2 ............................................................................. 6 Detection Section ........................................................................... 20 Changes to Table 3 ............................................................................. 7 Inserted Table 4 Renumbered Sequentially .................................. 7 6/11Rev. B to Rev. C Changes to Programming the Supply Fault Detectors Section ..... 11 Changes to Serial Bus Timing Parameter in Table 1 .................... 4 Changes to Outputs Section .......................................................... 14 Changes to Ordering Guide .......................................................... 24 Changes to Fault Reporting Section ............................................ 19 Changes to Figure 23 ...................................................................... 20 5/08Rev. A to Rev. B Inserted Table 9, Renumbered Sequentially ............................... 23 Changes to Table 1 ............................................................................ 4 Change to Ordering Guide ............................................................ 28 Changes to Powering the ADM1068 Section ............................. 10 Changes to Default Output Configuration Section ................... 13 1/05Revision 0: Initial Version Changes to Sequence Detector Section ....................................... 16 Changes to Table 9 .......................................................................... 19 Changes to Figure 35 and Error Correction Section ................. 23 Changes to Ordering Guide .......................................................... 24 Rev. D Page 2 of 25