ADM1166ASUZ-REEL7 Analog Devices

Super Sequencer with Margining Control and Nonvolatile Fault Recording Data Sheet ADM1166 FEATURES FUNCTIONAL BLOCK DIAGRAM AUX1 AUX2 REFIN REFOUT REFGND SDA SCL A1 A0 Complete supervisory and sequencing solution for up to 10 supplies ADM1166 VREF SMBus 16 event deep black box nonvolatile fault recording INTERFACE 10 supply fault detectors enable supervision of supplies to 12-BIT <0.5% accuracy at all voltages at 25C SAR ADC EEPROM <1.0% accuracy across all voltages and temperatures CLOSED-LOOP FAULT RECORDING MARGINING SYSTEM 5 selectable input attenuators allow supervision of supplies to VX1 PDO1 CONFIGURABLE 14.4 V on VH and 6 V on VP1 to VP4 (VPx) DUAL- PDO2 OUTPUT VX2 FUNCTION DRIVERS INPUTS 5 dual-function inputs, VX1 to VX5 (VXx) PDO3 VX3 PDO4 (LOGIC INPUTS (HV CAPABLE OF High impedance input to supply fault detector with VX4 OR PDO5 DRIVING GATES SFDs) OF N-FET) VX5 PDO6 thresholds between 0.573 V and 1.375 V SEQUENCING ENGINE General-purpose logic input VP1 PDO7 CONFIGURABLE 10 programmable driver outputs, PDO1 to PDO10 (PDOx) OUTPUT PROGRAMMABLE VP2 DRIVERS RESET PDO8 GENERATORS Open-collector with external pull-up VP3 (LV CAPABLE PDO9 OF DRIVING (SFDs) VP4 Push/pull output, driven to VDDCAP or VPx LOGIC SIGNALS) VH PDO10 Open collector with weak pull-up to VDDCAP or VPx AGND PDOGND Internally charge-pumped high drive for use with external VDD V V V V V V OUT OUT OUT OUT OUT OUT VDDCAP ARBITRATOR DAC DAC DAC DAC DAC DAC N-FET (PDO1 to PDO6 only) SE implements state machine control of PDO outputs State changes conditional on input events DAC1 DAC2 DAC3 DAC4 DAC5 DAC6 VCCP GND Figure 1. Enables complex control of boards APPLICATIONS Power-up and power-down sequence control Central office systems Fault event handling Servers/routers Interrupt generation on warnings Multivoltage system line cards Watchdog function can be integrated in SE DSP/FPGA supply sequencing Program software control of sequencing through SMBus In-circuit testing of margined supplies Complete voltage-margining solution for 6 voltage rails 6 voltage output 8-bit DACs (0.300 V to 1.551 V) allow voltage GENERAL DESCRIPTION adjustment via dc-to-dc converter trim/feedback node The ADM1166 Super Sequencer is a configurable supervisory/ 12-bit ADC for readback of all supervised voltages sequencing device that offers a single-chip solution for supply 2 auxiliary (single-ended) ADC inputs monitoring and sequencing in multiple-supply systems. In addition Reference input (REFIN) has 2 input options to these functions, the ADM1166 integrates a 12-bit ADC and Driven directly from 2.048 V (0.25%) REFOUT pin six 8-bit voltage output DACs. These circuits can be used to More accurate external reference for improved ADC implement a closed-loop margining system that enables supply performance adjustment by altering either the feedback node or reference of Device powered by the highest of VPx, VH for improved a dc-to-dc converter using the DAC outputs. redundancy User EEPROM: 256 bytes Supply margining can be performed with a minimum of external Industry-standard 2-wire bus interface (SMBus) components. The margining loop can be used for in-circuit testing Guaranteed PDO low with VH, VPx = 1.2 V of a board during production (for example, to verify board func- Available in 40-lead, 6 mm 6 mm LFCSP and tionality at 5% of nominal supplies), or it can be used dynamically 48-lead, 7 mm 7 mm TQFP packages to accurately control the output voltage of a dc-to-dc converter. For more information about the ADM1166 register map, refer to the AN-698 Application Note. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20102015 Analog Devices, Inc. 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MUX 09332-001ADM1166 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 SMBus Jump (Unconditional Jump) ........................................ 18 Functional Block Diagram .............................................................. 1 Sequencing Engine Application Example ............................... 19 Applications ....................................................................................... 1 Fault and Status Reporting ........................................................ 20 General Description ......................................................................... 1 Nonvolatile Black Box Fault Recording ................................... 21 Revision History ............................................................................... 2 Black Box Writes with No External Supply ............................ 21 Detailed Block Diagram .................................................................. 3 Voltage Readback............................................................................ 22 Specif icat ions ..................................................................................... 4 Supply Supervision with the ADC ........................................... 22 Absolute Maximum Ratings ............................................................ 7 Supply Margining ........................................................................... 23 Thermal Resistance ...................................................................... 7 Overview ..................................................................................... 23 ESD Caution .................................................................................. 7 Open-Loop Supply Margining ................................................. 23 Pin Configurations and Function Descriptions ........................... 8 Closed-Loop Supply Margining ............................................... 23 Typical Performance Characteristics ........................................... 10 Writing to the DACs .................................................................. 24 Powering the ADM1166 ................................................................ 13 Choosing the Size of the Attenuation Resistor ....................... 24 Slew Rate Consideration ............................................................ 13 DAC Limiting and Other Safety Features ............................... 24 Inputs ................................................................................................ 14 Applications Diagram .................................................................... 25 Supply Supervision ..................................................................... 14 Communicating with the ADM1166 ........................................... 26 Programming the Supply Fault Detectors ............................... 14 Configuration Download at Power-Up ................................... 26 Input Comparator Hysteresis .................................................... 14 Updating the Configuration ..................................................... 26 Input Glitch Filtering ................................................................. 15 Updating the Sequencing Engine ............................................. 27 VP1 Glitch Filtering ................................................................... 15 Internal Registers ........................................................................ 27 Supply Supervision with VXx Inputs ....................................... 15 EEPROM ..................................................................................... 27 VXx Pins as Digital Inputs ........................................................ 16 Serial Bus Interface ..................................................................... 27 Outputs ............................................................................................ 17 SMBus Protocols for RAM and EEPROM .............................. 29 Supply Sequencing Through Configurable Output Drivers ....... 17 Write Operations ........................................................................ 30 Default Output Configuration .................................................. 17 Read Operations ......................................................................... 31 Sequencing Engine ......................................................................... 18 Outline Dimensions ....................................................................... 33 O ver vie w ...................................................................................... 18 Ordering Guide .......................................................................... 33 Warnings ...................................................................................... 18 REVISION HISTORY 3/15Rev. 0 to Rev. A Changed Round-Robin Circuit to ADC Round-Robin ....................................................... Throughout Changes to Figure 3, Figure 4, and Table 4 ................................... 8 Added Slew Rate Consideration Section ..................................... 13 Added VP1 Glitch Filtering Section............................................. 15 Changes to Ordering Guide .......................................................... 33 12/10Revision 0: Initial Version Rev. A Page 2 of 33