Cascadable Super Sequencer with Margin Control and Fault Recording Data Sheet ADM1266 FEATURES GENERAL DESCRIPTION Complete supervisory and sequencing solution for up to The ADM1266 Super Sequencer is a configurable supervisory/ 17 supplies sequencing device that offers a single-chip solution for supply Expandable to 257 supplies with additional ADM1266 ICs monitoring and sequencing in systems with up to 17 supplies. connected to the 2-wire interdevice bus For systems with more supplies (up to 257), the operation of up Fully programmable sequencing engine to 16 ADM1266 devices can be synchronized through a proprie- 17 supply fault detectors enable real time supervision of tary 2-wire interface (interdevice bus). supplies The sequencing engine (SE) monitors the supply fault detectors 0.4 V to 15 V on VH1 to VH4 (VHx) (SFDs), programmable driver input/outputs (PDIOs), general- 0.4 V to 5 V on VP1 to VP13 (VPx) purpose inputs/outputs (GPIOs), and timers, and controls the Device powered by the higher of VH1 and VH2 inputs for PDIOs and GPIOs to sequence the supplies up and down as improved operating redundancy required. The logical core of the device is an Arm Cortex-M3 12-bit ADC for readback of all supervised voltages microcontroller. The firmware is supplied by Analog Devices, Black box nonvolatile fault recording Inc., and all configuration is performed through an intuitive 16 PDIOs graphic user interface (GUI). 9 GPIOs Additionally, the ADM1266 integrates an analog-to-digital 9 voltage output 8-bit DACs allow voltage margining converter (ADC) and voltage output digital-to-analog converters adjustment via dc-to-dc converter trim/feedback node (DACs) that can be used to adjust either the feedback node or Main and backup memory reference of a dc-to-dc converter to implement a closed-loop, Industry standard PMBus interface compliant autonomous, margining system. Available in a 9 mm 9 mm, 64-lead package A block of nonvolatile EEPROM is available to record voltage, APPLICATIONS time, and fault information when instructed to by the sequencing Communications infrastructure engine configuration. Industrial test and measurement FUNCTIONAL BLOCK DIAGRAM PDIO1 + PROGRAMMABLE VH1 GLITCH DRIVE FILTER OV OUTPUTS/INPUTS PDIO16 PROGRAMMABLE DAC SEQUENCING VH4 UV ENGINE + GPIO1 DAC GLITCH VP1 GPIOs FILTER GPIO9 LOGIC BLOCK ID SDA VP13 INTERDEVICE BUS ID SCL MARGINING DAC1 DAC SCL EEPROM AND SRAM DAC PMBus 12-BIT CONTROL INTERFACE SAR ADC SDA DAC9 DAC Figure 1. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 20182021 Analog Devices, Inc. All rights reserved. No license is granted by implication or otherwise under any patent or patent rights of Analog Technical Support www.analog.com Devices. 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MUX 15579-101ADM1266 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 System Logic Block ........................................................................ 26 Applications ...................................................................................... 1 Password Protection ...................................................................... 27 General Description ......................................................................... 1 Unlocking the Device ................................................................ 27 Functional Block Diagram .............................................................. 1 Locking the Device ..................................................................... 27 Revision History ............................................................................... 3 Changing the Password ............................................................. 27 Detailed Functional Block Diagram .............................................. 4 Memory ........................................................................................... 28 Specifications .................................................................................... 5 Overview ...................................................................................... 28 Absolute Maximum Ratings ......................................................... 11 Power-Up .................................................................................... 28 Thermal Resistance .................................................................... 11 Manual CRC Calculations ........................................................ 28 ESD Caution................................................................................ 11 Refresh ......................................................................................... 28 Pin Configuration and Function Descriptions .......................... 12 Auto Refresh ............................................................................... 28 Typical Performance Characteristics ........................................... 14 Acceleration Factor .................................................................... 28 Theory of Operation ...................................................................... 15 Internal Watchdog Timer ............................................................. 30 Powering the ADM1266 ............................................................ 15 Applications Information ............................................................. 31 Inputs ........................................................................................... 16 Overview ...................................................................................... 31 Programmable Driver Input/Outputs ..................................... 17 Powering the ADM1266 ........................................................... 31 General-Purpose Input/Outputs .............................................. 18 PCB Assembly and Layout Suggestions .................................. 31 Sequencing Engine (SE) ................................................................ 20 Capacitors .................................................................................... 31 Overview ...................................................................................... 20 Ground Connections ................................................................. 31 2 Power-Up and State 0 ................................................................ 20 PMBus/I C .................................................................................. 31 State Sections............................................................................... 20 IDB ............................................................................................... 31 Action Types ............................................................................... 20 Voltage Sensing .......................................................................... 31 Parallel Operation and Interdevice Bus .................................. 20 PDIOs and GPIOs ...................................................................... 31 States ............................................................................................ 21 DAC Outputs .............................................................................. 31 State Machine Control via PMBus ........................................... 21 Clock ............................................................................................ 31 Supply Margining ........................................................................... 22 Unused Pins ................................................................................ 31 Overview ...................................................................................... 22 PMBus Digital Communication .................................................. 32 Black Box (EEPROM) Fault Recording ...................................... 24 PMBus Features .......................................................................... 32 Black Box Writes When External Supply Is Powering Down Overview ...................................................................................... 32 ....................................................................................................... 24 Transfer Protocol ....................................................................... 32 Triggering a Black Box Write ................................................... 24 Data Transfer Commands ........................................................ 33 Black Box Record Mode ............................................................ 24 Group Command Protocol ....................................................... 34 Power-Up Counter ..................................................................... 24 Clock Generation and Stretching ............................................ 34 Black Box Write Time ............................................................... 24 Start and Stop Conditions ......................................................... 34 Black Box Contents .................................................................... 24 Repeated Start Condition .......................................................... 34 Time Stamping ................................................................................ 25 General Call Support ................................................................. 34 Setting UNIX Time Using SET RTC ...................................... 25 PMBus Address Selection ......................................................... 35 Internal Oscillator ...................................................................... 25 Fast Mode .................................................................................... 35 External Oscillator...................................................................... 25 10-Bit Addressing ....................................................................... 35 Multiple Device Time Stamping .............................................. 25 Packet Error Checking .............................................................. 35 Rev. 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