5 V Low Power EIA RS-485 Transceiver ADM485 FEATURES FUNCTIONAL BLOCK DIAGRAM Meets EIA RS-485 standard ADM485 5 Mbps data rate Single 5 V supply RO 1 8 V R CC 7 V to +12 V bus common-mode range RE 2 7 B High speed, low power BiCMOS Thermal shutdown protection 3 6 A DE Short-circuit protection 4 5 DI D GND Driver propagation delay: 10 ns typical Receiver propagation delay: 15 ns typical High-Z outputs with power off Superior upgrade for LTC485 Figure 1. APPLICATIONS Low power RS-485 systems DTE/DCE interface Packet switching Local area networks (LNAs) Data concentration Data multiplexers Integrated services digital network (ISDN) GENERAL DESCRIPTION The ADM485 is a differential line transceiver suitable for high The receiver contains a fail-safe feature that results in a logic speed bidirectional data communication on multipoint bus high output state if the inputs are unconnected (floating). transmission lines. It is designed for balanced data transmission The ADM485 is fabricated on BiCMOS, an advanced mixed and complies with EIA standards RS-485 and RS-422. The part technology process combining low power CMOS with fast contains a differential line driver and a differential line receiver. switching bipolar technology. All inputs and outputs contain Both the driver and the receiver can be enabled independently. protection against ESD all driver outputs feature high source When disabled, the outputs are three-stated. and sink current capability. An epitaxial layer is used to guard against latch-up. The ADM485 operates from a single 5 V power supply. Excessive power dissipation caused by bus contention or by The ADM485 features extremely fast switching speeds. Minimal output shorting is prevented by a thermal shutdown circuit. If driver propagation delays permit transmission at data rates up during fault conditions, a significant temperature increase is to 5 Mbps while low skew minimizes EMI interference. detected in the internal driver circuitry, this feature forces the The part is fully specified over the commercial and industrial driver output into a high impedance state. temperature range and is available in 8-lead PDIP, 8-lead SOIC, Up to 32 transceivers can be connected simultaneously on a and small footprint, 8-lead MSOP packages. bus, but only one driver should be enabled at any time. It is important, therefore, that the remaining disabled drivers do not load the bus. To ensure this, the ADM485 driver features high output impedance when disabled and when powered down, which minimizes the loading effect when the transceiver is not being used. The high impedance driver output is maintained over the common-mode voltage range of 7 V to +12 V. Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 19932008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 00078-001ADM485 TABLE OF CONTENTS Features .............................................................................................. 1 Test Circuits..................................................................................... 10 Applications....................................................................................... 1 Switching Characteristics .............................................................. 11 Functional Block Diagram .............................................................. 1 Applications Information .............................................................. 12 General Description ......................................................................... 1 Differential Data Transmission ................................................ 12 Revision History ............................................................................... 2 Cable and Data Rate................................................................... 12 Specifications..................................................................................... 3 Thermal Shutdown .................................................................... 12 Timing Specifications .................................................................. 4 Propagation Delay...................................................................... 12 Absolute Maximum Ratings............................................................ 5 Receiver Open Circuit, Fail-Safe .............................................. 12 ESD Caution.................................................................................. 5 Outline Dimensions ....................................................................... 13 Pin Configuration and Function Descriptions............................. 6 Ordering Guide .......................................................................... 14 Typical Performance Characteristics ............................................. 7 REVISION HISTORY 04/08Rev. E to Rev. F 1/03Rev. B to Rev. C. Updated Format..................................................................Universal Change to Specifications ..................................................................2 Changes to Table 2............................................................................ 4 Change to Ordering Guide...............................................................3 Updated Outline Dimension......................................................... 13 12/02Rev. A to Rev. B. Changes to Ordering Guide .......................................................... 14 Deleted Q-8 Package ..........................................................Universal 10/03Rev. D to Rev. E Edits to Features.................................................................................1 Changes to Timing Specifications.................................................. 2 Edits to General Description ...........................................................1 Updated Ordering Guide................................................................. 3 Edits, additions to Specifications.....................................................2 Edits, additions to Absolute Maximum Ratings............................3 7/03Rev. C to Rev. D Additions to Ordering Guide...........................................................3 Changes to Absolute Maximum Ratings ....................................... 3 TPCs Updated and Reformatted .....................................................5 Changes to Ordering Guide ............................................................ 3 Addition of 8-Lead MSOP Package ................................................9 Update to Outline Dimensions....................................................... 9 Update to Outline Dimensions........................................................9 Rev. F Page 2 of 16