Full-Duplex, Low Power, Slew Rate Limited, EIA RS-485 Transceivers ADM488/ADM489 FEATURES FUNCTIONAL BLOCK DIAGRAMS Meets EIA RS-485 and RS-422 standards ADM488 250 kbps data rate A Single 5 V 10% supply RO R B 7 V to +12 V bus common-mode range 12 k input impedance Z 2 kV EFT protection meets IEC1000-4-4 DI D High EM immunity meets IEC1000-4-3 Y Reduced slew rate for low EM interference Short-circuit protection Figure 1. Excellent noise immunity 30 A supply current ADM489 APPLICATIONS A RO R Low power RS-485 and RS-422 systems B RE DTE-DCE interface DE Packet switching Z Local area networks DI D Y Data concentration Data multiplexers Figure 2. Integrated services digital network (ISDN) GENERAL DESCRIPTION The receiver contains a fail-safe feature that results in a logic The ADM488 and ADM489 are low power, differential line high output state if the inputs are unconnected (floating). transceivers suitable for communication on multipoint bus transmission lines. They are intended for balanced data The ADM488/ADM489 are fabricated on BiCMOS, an transmission and comply with both Electronics Industries advanced mixed technology process combining low power Association (EIA) RS-485 and RS-422 standards. Both products CMOS with fast switching bipolar technology. contain a single differential line driver and a single differential line receiver, making them suitable for full-duplex data transfer. The ADM488/ADM489 are fully specified over the industrial The ADM489 contains an additional receiver and driver enable temperature range and are available in PDIP, SOIC, and TSSOP control. packages. The input impedance is 12 k, allowing 32 transceivers to be connected on the bus. The ADM488/ADM489 operate from a single 5 V 10% power supply. Excessive power dissipation caused by bus contention or output shorting is prevented by a thermal shutdown circuit. This feature forces the driver output into a high impedance state if, during fault conditions, a significant temperature increase is detected in the internal driver circuitry. Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 00079-002 00079-001ADM488/ADM489 TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 11 Applications....................................................................................... 1 EFT Transient Protection Scheme ........................................... 11 General Description ......................................................................... 1 Fast Transient Burst Immunity (IEC1000-4-4)...................... 11 Functional Block Diagrams............................................................. 1 Radiated Immunity (IEC1000-4-3) ......................................... 12 Specifications..................................................................................... 3 EMI Emissions............................................................................ 13 Timing Specifications .................................................................. 4 Conducted Emissions ................................................................ 13 Absolute Maximum Ratings............................................................ 5 Application Information................................................................ 14 ESD Caution.................................................................................. 5 Differential Data Transmission ................................................ 14 Pin Configurations and Function Descriptions ........................... 6 Cable and Data Rate................................................................... 14 Test Circuits................................................................................... 7 Outline Dimensions....................................................................... 15 Switching Characteristics ............................................................ 8 Ordering Guide .......................................................................... 16 Typical Performance Characteristics ............................................. 9 REVISION HISTORY 4/06Rev. C to Rev. D Updated Outline Dimensions ....................................................... 15 Changes to Ordering Guide .......................................................... 16 11/04Rev. B to Rev. C Updated Format..................................................................Universal Changes to Receiving Truth Table Inputs Data Section............ 11 Renamed General Information to Theory of Operation........... 12 Updated Outline Dimensions ....................................................... 15 Changes to Ordering Guide .......................................................... 16 5/01Rev. A to Rev. B Changes to Absolute Maximum Ratings Section......................... 3 3/01Rev. 0 to Rev. A Changes to ESD Specification, Absolute Maximum Ratings...... 3 6/97Revision 0: Initial Version Rev. D Page 2 of 16