FET Drive Simple Sequencers ADM6819/ADM6820 FEATURES FUNCTIONAL BLOCK DIAGRAM V V CC1 CC1 Single chip enables power supply sequencing of two Q1 V V OUT supplies CC2 CC2 V V CC1 CC2 On-board charge pump fully enhances N-channel FET CHARGE V Adjustable primary supply monitor to 0.618 V FET PUMP Delay from primary supply to secondary supply enabled UVLO Fixed 300 ms delay (ADM6819) R1 LOGIC SETV Capacitor adjustable delay (ADM6820) GATE FET DRIVER Logic/analog driven enable input (ADM6819) 0.618V R2 40C to +85C operating range Packaged in small 6-lead SOT-23 package TIMER Pin-to-pin compatibility with MAX6819/MAX6820 ADM6819/ 0.618V ADM6820 APPLICATIONS GND EN (ADM6819) - DIGITAL/ANALOG SETD (ADM6820) Multivoltage systems Figure 1. Dual voltage microprocessors/FPGAs/ASICs/DSPs Network processors Telecom and datacom systems PC/server applications GENERAL DESCRIPTION The ADM6819 and ADM6820 are simple power supply sequencers The ADM6819 features an enable (EN) pin that is fed to the with FET drive capability for enhancing N-channel MOSFETs. input of an additional comparator and reference circuit. This These devices can monitor a primary supply voltage and pin can be used as a digital enable or a secondary power good enable/disable an external N-channel FET for a secondary comparator to monitor a second supply and enables the GATE supply. The ADM6819 has the ability to monitor two supplies. only if both supplies are valid. When both inputs of the internal When more than two voltages require sequencing, multiple comparators are above the threshold, a fixed 300 ms timeout ADM6819/ADM6820 devices can be cascaded to achieve this. occurs before the GATE is driven high and the secondary The devices operate over a supply range of 2.95 V to 5.5 V. supply is enabled. An internal comparator monitors the primary supply using the The ADM6820 has only one comparator that is on the SETV VSET pin. The input to this comparator is externally set via a pin. It also features a timeout period that is adjustable via a resistor divider from the primary supply. When the voltage at single external capacitor on the SETD pin. the VSET pin rises above the comparator threshold, an internal The ADM6819/ADM6820 are packaged in small 6-lead SOT-23 charge pump on the GATE output enhances the secondary packages. supply FET. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 05133-001ADM6819/ADM6820 TABLE OF CONTENTS Features .............................................................................................. 1 Pin Configuration and Function Descriptions..............................7 Applications....................................................................................... 1 Typical Performance Characteristics ..............................................8 Functional Block Diagram .............................................................. 1 Theory of Operation ...................................................................... 10 General Description ......................................................................... 1 SETV Pin ..................................................................................... 10 Revision History ............................................................................... 2 EN Pin.......................................................................................... 10 Specifications..................................................................................... 3 GATE Pin .................................................................................... 10 Timing Diagrams.............................................................................. 4 SETD Pin ..................................................................................... 10 Absolute Maximum Ratings............................................................ 6 Outline Dimensions....................................................................... 11 Thermal Characteristics .............................................................. 6 Ordering Guide .......................................................................... 11 ESD Caution.................................................................................. 6 REVISION HISTORY 7/06Rev. 0: Initial Version Rev. 0 Page 2 of 12