800 mA Ultralow Noise, High PSRR, RF Linear Regulator Data Sheet ADM7151 FEATURES TYPICAL APPLICATION CIRCUIT ADM7151-04 Input voltage range: 4.5 V to 16 V V = 6.2V V = 5.0V IN OUT Maximum output current: 800 mA VIN VOUT C C IN OUT Adjustable output from 1.5 V to 5.1 V 10F 10F ON Low noise EN REF C REF 1.0 V rms total integrated noise from 100 Hz to 100 kHz OFF V BYP 1F BYP C BYP 1.6 V rms total integrated noise from 10 Hz to 100 kHz 1F R1 V = 1.5V (R1 + R2)/R2 Noise spectral density: 1.7 nVHz from 10 kHz to 1 MHz OUT REF SENSE Power supply rejection ratio (PSRR) at 400 mA load R2 V REG 1k < R2 < 200k VREG >90 dB from 1 kHz to 100 kHz, V = 5 V OUT GND C REG 10F >60 dB at 1 MHz, V = 5 V OUT Dropout voltage: 0.6 V at V = 5 V, 800 mA load OUT Figure 1. ADM7151-04 with VOUT = 5 V Initial voltage accuracy: 1% Voltage accuracy over line, load and temperature: 2% Quiescent current (I ): 4.3 mA at no load GND Low shutdown current: 0.1 A Stable with a 10 F ceramic output capacitor 8-lead LFCSP package and 8-lead SOIC package APPLICATIONS Regulated power noise sensitive applications RF mixers, phase-locked loops (PLLs), voltage-controlled oscillators (VCOs), and PLLs with integrated VCOs Clock distribution circuits Ultrasound and other imaging applications High speed RF transceivers High speed, 16-bit or greater ADCs Communications and infrastructure Cable digital-to-analog converter (DAC) drivers but also providing excellent thermal performance for applications GENERAL DESCRIPTION requiring up to 800 mA of output current in a small, low profile The ADM7151 is a low dropout (LDO) linear regulator that footprint. operates from 4.5 V to 16 V and provides up to 800 mA of output 100k current. Using an advanced proprietary architecture, it provides C = 1F BYP C = 10F BYP high power supply rejection (>90 dB from 1 kHz to 1 MHz), C = 100F BYP ultralow noise (1.7 nVHz from 10 kHz to 1 MHz), and excellent C = 1mF 10k BYP line and load transient response with a 10 F ceramic output capacitor. The output voltage can be set to any voltage between 1k 1.5 V and 5.1 V with two resistors. The ADM7151 is available in two models that optimize power 100 dissipation and PSRR performance as a function of input and output voltage. See Table 6 and Table 7 for selection guides. 10 The ADM7151 regulator output noise is 1.0 V rms from 100 Hz to 100 kHz, and the noise spectral density is 1.7 nV/Hz 1 from 10 kHz to 1 MHz. 0.1 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) The ADM7151 is available in 8-lead, 3 mm 3 mm LFCSP and Figure 2. Noise Spectral Density (NSD) vs. Frequency for Various CBYP 8-lead SOIC packages, making it not only a very compact solution, Rev. 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NOISE SPECTRAL DENSITY (nV/Hz) 11480-001 11480-002ADM7151 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 15 Applications ....................................................................................... 1 Applications Information .............................................................. 16 Typical Application Circuit ............................................................. 1 Model Selection .......................................................................... 16 General Description ......................................................................... 1 Capacitor Selection .................................................................... 16 Revision History ............................................................................... 2 Enable (EN) and Undervoltage Lockout (UVLO) ................. 18 Specifications ..................................................................................... 3 Start-Up Time ............................................................................. 19 Input and Output Capacitor, Recommended Specifications .. 4 REF, BYP, and VREG Pins ......................................................... 19 Absolute Maximum Ratings ............................................................ 5 Current-Limit and Thermal Overload Protection ................. 19 Thermal Data ................................................................................ 5 Thermal Considerations ............................................................ 19 Thermal Resistance ...................................................................... 5 Printed Circuit Board Layout Considerations ....................... 22 ESD Caution .................................................................................. 5 Outline Dimensions ....................................................................... 23 Pin Configurations and Function Descriptions ........................... 6 Ordering Guide .......................................................................... 24 Typical Performance Characteristics ............................................. 7 REVISION HISTORY 8/2019Rev. A to Rev. B 4/2015Rev. 0 to Rev. A Changes to Figure 18 ........................................................................ 9 Change to Figure 4 ............................................................................ 6 Updated Outline Dimensions ....................................................... 23 Change to Figure 39 ....................................................................... 12 Changes to Ordering Guide .......................................................... 24 9/2013Revision 0: Initial Version Rev. B Page 2 of 24