K Band Downconverter with Integrated Fractional-N PLL and VCO Data Sheet ADMV4420 FEATURES GENERAL DESCRIPTION RF front end with integrated RF balun and LNA The ADMV4420 is a highly integrated, double balanced, active Double balanced, active mixer with high dynamic range IF mixer with an integrated fractional-N synthesizer, ideally suited amplifier for next generation K band satellite communications. Fractional-N synthesizer with low phase noise, multicore VCO The RF front end consists of an integrated RF balun and low 5 V supply operation with integrated LDO regulators noise amplifier (LNA) for an optimal, 7 dB, single-sideband Output P1dB: 7 dBm noise figure while minimizing external components. Additionally, Output IP3: 16 dBm the high dynamic range IF output amplifier provides a nominal Conversion gain: 36 dB conversion gain of 36 dB. Noise figure: 7 dB An integrated low phase noise, fractional-N, phase-locked loop RF input frequency range: 16.95 GHz to 22.05 GHz (PLL) with a multicore voltage controlled oscillator (VCO) and Internal LO frequency range: 16.35 GHz to 21.15 GHz internal 2 multiplier generate the necessary on-chip LO signal IF frequency range: 900 MHz to 2500 MHz for the double balanced mixer, eliminating the need for external Single-ended 50 input impedance and 75 IF output frequency synthesis. The multicore VCO uses an internal impedance autocalibration routine that allows the PLL to select the Programmable via 4-wire SPI necessary settings and lock in approximately 400 s. 32-lead, 5 mm 5 mm LFCSP The reference input to the PLL employs a differentially excited APPLICATIONS 50 MHz crystal oscillator. Alternatively, the reference input can Satellite communication be driven by an external, singled-ended, 50 MHz source. The Point to point microwave communication phase frequency detector (PFD) comparison frequency of the PLL operates up to 50 MHz. The ADMV4420 is fabricated on a silicon germanium (SiGe), bipolar complementary metal-oxide semiconductor (BiCMOS) process, and is available in a 32-lead, RoHS compliant, 5 mm 5 mm LFCSP package with an exposed pad. The device is specified over the 40C to +85C temperature range on a 5 V power supply. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20182019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 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Technical Support www.analog.com ADMV4420 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 IF OutputExternal Inductor/Biasing ................................... 40 Applications ....................................................................................... 1 SPI Configuration ...................................................................... 40 General Description ......................................................................... 1 VCO Autocalibration and Automatic Level Control ............. 40 Revision History ............................................................................... 3 Programming Sequence ............................................................ 40 Functional Block Diagram .............................................................. 4 Control Registers ............................................................................ 41 Specif icat ions ..................................................................................... 5 Register Details ............................................................................... 42 Absolute Maximum Ratings ............................................................ 7 Address 0x000, Reset: 0x00, Name: ADI SPI CONFIG 1 .. 42 Thermal Resistance ...................................................................... 7 Address 0x001, Reset: 0x00, Name: ADI SPI CONFIG 2 .. 43 ESD Caution .................................................................................. 7 Address 0x003, Reset: 0x01, Name: CHIPTYPE .................... 44 Pin Configuration and Function Descriptions ............................. 8 Address 0x004, Reset: 0x03, Name: PRODUCT ID L ........ 44 Interface Schematics..................................................................... 9 Address 0x005, Reset: 0x00, Name: PRODUCT ID H ....... 44 Typical Performance Characteristics ........................................... 10 Address 0x00A, Reset: 0x00, Name: SCRATCHPAD ............ 44 IF = 900 MHz, Low-Side Injection LO Performance ............ 10 Address 0x00B, Reset: 0x00, Name: SPI REV ........................ 44 IF = 900 MHz, High-Side Injection LO Performance ........... 12 Address 0x103, Reset: 0x6F, Name: ENABLES ....................... 45 IF = 1700 MHz, Low-Side Injection LO Performance .......... 14 Address 0x108, Reset: 0x05, Name: SDO LEVEL ................. 45 IF = 1700 MHz, High-Side Injection LO Performance ......... 16 Address 0x200, Reset: 0xA7, Name: INT L ........................... 46 IF = 2500 MHz, Low-Side Injection LO Performance .......... 18 Address 0x201, Reset: 0x00, Name: INT H ........................... 46 IF = 2500 MHz, High-Side Injection LO Performance ......... 20 Address 0x202, Reset: 0x02, Name: FRAC L ......................... 46 LO = 16.75 GHz, Low-Side Injection Performance ............... 22 Address 0x203, Reset: 0x00, Name: FRAC M ....................... 46 LO = 16.75 GHz, High-Side Injection Performance ............. 24 Address 0x204, Reset: 0x00, Name: FRAC H ........................ 46 LO = 18.95 GHz, Low-Side Injection Performance ............... 26 Address 0x208, Reset: 0x04, Name: MOD L ......................... 47 LO = 18.95 GHz, High-Side Injection Performance ............. 28 Address 0x209, Reset: 0x00, Name: MOD M ........................ 47 LO = 21.15 GHz, Low-Side Injection Performance ............... 30 Address 0x20A, Reset: 0x00, Name: MOD H ........................ 47 LO = 21.15 GHz, High-Side Injection Performance ............. 32 Address 0x20C, Reset: 0x01, Name: R DIV L ...................... 48 Phase Noise Performance .......................................................... 34 Address 0x20D, Reset: 0x00, Name: R DIV H ..................... 48 Return Loss and Isolation .......................................................... 35 Address 0x20E, Reset: 0x00, Name: REFERENCE ................ 48 Spurious and Harmonics Performance ................................... 36 Address 0x211, Reset: 0x00, Name: VCO DATA READBACK1 ..................................................... 49 Theory of Operation ...................................................................... 37 Address 0x212, Reset: 0x00, Name: Reference Input Stage ................................................................. 37 VCO DATA READBACK2 ..................................................... 49 Reference Doubler, R Counter, and RDIV2 ............................ 37 Address 0x213, Reset: 0x01, Name: PLL MUX SEL ............ 50 N Counter .................................................................................... 38 Address 0x214, Reset: 0x98, Name: LOCK DETECT .......... 50 INT, FRAC, MOD, and Reference Path Relationship ............ 38 Address 0x215, Reset: 0x00, Name: VCO BAND SELECT 51 Integer-N Mode .......................................................................... 38 Address 0x216, Reset: 0x00, Name: VCO ALC TIMEOUT 51 Phase Frequency Detector and Charge Pump ........................ 38 Address 0x217, Reset: 0x01, Name: VCO MANUAL ........... 51 Loop Filter ................................................................................... 39 Address 0x219, Reset: 0x13, Name: ALC ................................ 51 CP Current Setup ....................................................................... 39 Address 0x21C, Reset: 0x90, Name: VCO TIMEOUT1 ...... 52 Bleed Current (CP BLEED) Setup .......................................... 39 Address 0x21D, Reset: 0x01, Name: VCO TIMEOUT2 ...... 52 MUXOUT .................................................................................... 39 Address 0x21E, Reset: 0x4B, Name: VCO BAND DIV ...... 52 Digital Lock Detect .................................................................... 40 Address 0x21F, Reset: 0x18, Name: VCO READBACK SEL Enables ......................................................................................... 40 ....................................................................................................... 52 Rev. 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