E-Band Upconverter SiP, 71 GHz to 76 GHz Data Sheet ADMV7310 FEATURES GENERAL DESCRIPTION Maximum conversion gain: 35 dB typical The ADMV7310 is a fully integrated system in package (SiP), Gain tuning range: 40 dB minimum in phase/quadrature (I/Q) upconverter that operates between P : 26 dBm typical for a gain = 23.5 dB and 19.5 dB SAT an intermediate frequency (IF) input range of dc to 2 GHz and OIP3: 31 dBm typical for a gain = 23.5 dB and P = OUT a RF output range of 71 GHz to 76 GHz. The device uses an 16.5 dBm per tone image rejection mixer that is driven by a 6 local oscillator OP1dB: 25 dBm typical for a gain = 23.5 dB and 19.5 dB (LO) multiplier. The mixer RF output is followed by a variable Built-in power detector gain amplifier (VGA) and a power amplifier (PA), providing a Built-in envelope detector for LO nulling conversion gain of 35 dB typical. Differential I and Q mixer inputs Fully integrated, surface-mount, 50-terminal, 16.00 mm are provided and can be driven with differential I and Q baseband 14.00 mm LGA CAV package waveforms for direct conversion applications. Alternatively, the inputs can be driven using an external 90 hybrid and two external APPLICATIONS 180 hybrids for single-ended applications. E-band communication systems The ADMV7310 comes in a fully integrated, surface-mount, High capacity wireless backhauls 50-terminal, 16.00 mm 14.00 mm, chip array small outline Test and measurement no lead cavity (LGA CAV) package. The ADMV7310 operates Aerospace and defense over the 40C to +85C temperature range. FUNCTIONAL BLOCK DIAGRAM 1 GND IF IP 2 6 3 IF IN IF QN 4 5 IF QP ADMV7310 GND 6 PORT 1 RFOUT VGA VG12 7 8 GND VGA PA VGA VD12 9 10 ENV DET VGA CTL12 11 GND 12 Figure 1. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 20192021 Analog Devices, Inc. All rights reserved. No license is granted by implication or otherwise under any patent or patent rights of Analog Technical Support www.analog.com Devices. Trademarks and registered trademarks are the property of their respective owners. GND 13 50 GND GND 14 49 VG MIXER GND 15 48 VD AMP VGA VG345 16 47 GND VGA VD345 17 46 VG AMP GND 18 45 GND VGA VG6 19 44 VD MULT VGA VD6 20 43 GND DET1 REF 21 42 VG MULT 22 DET1 OUT 41 GND GND 23 40 LOIN PA VG1 24 39 GND GND 25 38 GND PA VG2 26 37 PA VD1 GND 27 36 GND DET2 REF 28 35 PA VD2 DET2 OUT 29 34 GND GND 30 33 GND GND 31 32 GND 20977-001ADMV7310 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 23 Applications ...................................................................................... 1 Mixer and LO Path .................................................................... 23 General Description ......................................................................... 1 Envelope Detector, VGA, and Power Detector ..................... 23 Functional Block Diagram .............................................................. 1 Power Amplifier and Power Detector ..................................... 23 Revision History ............................................................................... 2 Applications Information ............................................................. 25 Specifications .................................................................................... 3 Power-Up Bias Sequence .......................................................... 25 Absolute Maximum Ratings ........................................................... 5 Power-Down Bias Sequence ..................................................... 25 Thermal Resistance ...................................................................... 5 LO Nulling .................................................................................. 25 ESD Caution.................................................................................. 5 Gain Tuning Procedure............................................................. 26 Pin Configuration and Function Descriptions ............................ 6 Layout .......................................................................................... 27 Interface Schematics .................................................................... 8 Typical Application Circuit .......................................................... 28 Typical Performance Characteristics ............................................. 9 Outline Dimensions ....................................................................... 29 Detector Performance ............................................................... 19 Ordering Guide .......................................................................... 29 Return Loss Performance .......................................................... 21 Spurious Performance ............................................................... 22 REVISION HISTORY 10/2021Rev. B to Rev. C Updated Outline Dimensions ....................................................... 29 12/2020Rev. A to Rev. B Changes to Figure 79 ..................................................................... 21 10/2019Revision A: Initial Version Rev. C Page 2 of 29