E-Band Low Noise Downconverter SiP, 81 GHz to 86 GHz Data Sheet ADMV7420 FEATURES FUNCTIONAL BLOCK DIAGRAM Conversion gain: 10 dB typical Image rejection: 30 dBc typical Noise figure: 5 dB typical Input IP3: 1 dBm typical Input IP2: 26 dBm typical Input P1dB: 5 dBm typical GND 1 6 LO leakage at RFIN: <55 dBm typical IF IP 2 I/Q amplitude imbalance: 0.5 dB typical x6 I/Q phase imbalance: 5 typical IF IN 3 Fully integrated, surface-mount, 34-terminal, 11 mm IF QN 4 13 mm LGA CAV package IF QP 5 APPLICATIONS GND 6 PORT 1 RFIN E-band communication systems GND 7 High capacity wireless backhauls GND 8 Test and measurement Aerospace and defense GND 9 ADMV7420 GND 10 Figure 1. GENERAL DESCRIPTION The ADMV7420 is a fully integrated system in package (SiP) in Q mixer outputs are provided for direct conversion applications. phase/quadrature (I/Q) downconverter that operates between Alternatively, the outputs can be combined using an external an intermediate frequency (IF) output range of dc and 2 GHz 90 hybrid and two external 180 hybrids for single-ended and a radio frequency (RF) input range of 81 GHz and 86 GHz. applications. The device provides a small signal conversion gain of 10 dB The ADMV7420 comes in a fully integrated, surface-mount, with 30 dBc of image rejection. The ADMV7420 uses a low 34-terminal, 11 mm 13 mm, chip array small outline no lead noise amplifier followed by an image rejection mixer that is cavity (LGA CAV) package. The ADMV7420 operates over the driven by a 6 local oscillator (LO) multiplier. Differential I and 40C to +85C case temperature range. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 2019-2021 Analog Devices, Inc. All rights reserved. No license is granted by implication or otherwise under any patent or patent rights of Analog Technical Support www.analog.com Devices. Trademarks and registered trademarks are the property of their respective owners. GND 11 34 GND GND 12 33 VG MIXER VD34 LNA 13 32 VD AMP GND 14 31 GND VG34 LNA 15 30 VG AMP GND 16 29 GND GND 17 28 VD MULT VD12 LNA 18 27 GND GND 19 26 VG MULT 20 25 VG12 LNA GND GND 21 24 LOIN GND 22 23 GND 20970-001ADMV7420 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Return Loss and 6 LO Leakage .............................................. 19 Applications ...................................................................................... 1 Spurious Performance ............................................................... 20 Functional Block Diagram .............................................................. 1 Theory of Operation ...................................................................... 21 General Description ......................................................................... 1 Applications Information ............................................................. 22 Revision History ............................................................................... 2 Power-Up Bias Sequence .......................................................... 22 Specifications .................................................................................... 3 Power-Down Sequence ............................................................. 22 Absolute Maximum Ratings ........................................................... 4 Layout .......................................................................................... 22 Thermal Resistance ...................................................................... 4 Typical Application Circuit .......................................................... 24 ESD Caution.................................................................................. 4 Outline Dimensions ....................................................................... 25 Pin Configuration and Function Descriptions ............................ 5 Ordering Guide .......................................................................... 25 Interface Schematics .................................................................... 6 Typical Performance Characteristics ............................................. 7 REVISION HISTORY 10/2021Rev. A to Rev. B Updated Outline Dimensions ....................................................... 25 10/2019Revision A: Initial Version Rev. B Page 2 of 25