2 GHz to 18 GHz, Digitally Tunable, High-Pass and Low-Pass Filter Enhanced Product ADMV8818-EP FEATURES GENERAL DESCRIPTION Digitally tunable, multioctave, high-pass and low-pass tuning The ADMV8818-EP is a fully monolithic microwave integrated Independent 3 dB frequency control for up to 4 GHz of circuit (MMIC) that features a digitally selectable frequency of bandwidth operation. The device features four independently controlled high- Optimal wideband rejection: 35 dB pass filters (HPFs) and four independently controlled low-pass Single chip replacement for discrete filter banks filters (LPFs) that span the 2 GHz to 18 GHz frequency range. Compact 9 mm 9 mm, 56-terminal LGA package The flexible architecture of the ADMV8818-EP allows the 3 dB cutoff frequency (f ) of the high-pass and low-pass filters to be 3dB ENHANCED PRODUCT FEATURES controlled independently to generate up to 4 GHz of bandwidth. Supports defense and aerospace applications (AQEC standard) The digital logic control on each filter is 4 bits wide (16 states) and Military temperature range of 55C to +105C controls the on-chip reactive elements to adjust the f3dB. The typical Controlled manufacturing baseline insertion loss is 9 dB, and the wideband rejection is 35 dB, which is One assembly and test site ideally suited for minimizing system harmonics. One fabrication site Production change notification This tunable filter can be used as a smaller alternative to large Qualification data available on request switched filter banks and cavity tuned filters, and this device provides a dynamically adjustable solution in advanced APPLICATIONS communications applications. Test and measurement equipment Military radar, electronic warfare, and electronic countermeasures Satellite communications and space Industrial and medical equipment FUNCTIONAL BLOCK DIAGRAM GND 1 42 GND ADMV8818-EP GND 2 41 VSS1 (2.5V) BYPASS BYPASS GND 3 40 GND GND 4 39 VDD2 (+3.3V) 1 1 GND 5 38 GND GND 37 GND 6 RFIN 7 36 RFOUT 2 2 GND 8 35 GND GND 9 34 GND 3 3 GND 10 33 GND GND 11 32 GND 4 4 GND 12 31 VDD1 (+2.5V) GND 30 GND 13 RST SPI 29 GND 14 Figure 1. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 2021 Analog Devices, Inc. All rights reserved. No license is granted by implication or otherwise under any patent or patent rights of Analog Technical Support www.analog.com Devices. Trademarks and registered trademarks are the property of their respective owners. GND 15 56 GND SCLK 16 55 GND GND 17 54 GND CS 18 53 GND GND 19 52 GND SDO 20 51 GND GND 21 50 GND SDI 22 49 GND GND 23 48 GND 24 SFL 47 GND 25 46 GND GND GND 26 45 GND GND 27 44 GND GND 28 43 GND 25603-001ADMV8818-EP Enhanced Product TABLE OF CONTENTS Features .............................................................................................. 1 SPI Configuration ...................................................................... 15 Enhanced Product Features ............................................................ 1 RF Connections .......................................................................... 15 Applications ...................................................................................... 1 Mode Selection ........................................................................... 15 General Description ......................................................................... 1 SPI Write Mode .......................................................................... 16 Functional Block Diagram .............................................................. 1 Switch Positions ......................................................................... 16 Revision History ............................................................................... 2 Switch Set .................................................................................... 16 Specifications .................................................................................... 3 Filter Settings .............................................................................. 16 Timing Specifications .................................................................. 5 Write Group Priority ................................................................. 16 Absolute Maximum Ratings ........................................................... 7 Frequency Terminology ............................................................ 16 Electrostatic Discharge (ESD) Ratings ...................................... 7 SPI Fast Latch Mode .................................................................. 16 ESD Caution.................................................................................. 7 Chip Reset ................................................................................... 17 Pin Configuration and Function Descriptions ............................ 8 Applications Information ............................................................. 18 Typical Performance Characteristics ............................................. 9 PCB Design Guidelines ............................................................. 18 4 GHz Constant Bandwidth Data .............................................. 9 Programming Flow Chart ............................................................. 19 Board Loss and Bypass Configuration Data ........................... 11 Register Summary .......................................................................... 20 HPF and LPF Configuration..................................................... 12 Register Details ............................................................................... 27 Theory of Operation ...................................................................... 14 Outline Dimensions ....................................................................... 36 Chip Architecture ....................................................................... 14 Ordering Guide .......................................................................... 36 Tunable High-Pass Filters ......................................................... 14 Tunable Low-Pass Filters .......................................................... 15 REVISION HISTORY 5/2021Rev. 0 to Rev. A Changes to Figure 16 and Figure 17 ............................................ 11 Changed ADMV8818 to ADMV8818-EP ..................... Universal Changes to Figure 19, Figure 20, Figure 21, Figure 22, Figure 23, Added Enhanced Product Features Section ................................. 1 and Figure 24 .................................................................................. 12 Changes to Table 1 ........................................................................... 4 Changes to Figure 25, Figure 26, Figure 27, Figure 28, and Changes to Electrostatic Discharge (ESD) Ratings Section and Figure 29 .......................................................................................... 13 Table 4 ................................................................................................ 7 Changes to Ordering Guide .......................................................... 36 Changes to Figure 4, Figure 5, Figure 6, Figure 8, and Figure 9 9 Changes to Figure 10, Figure 11, Figure 13, and Figure 14 ...... 10 12/2020Revision 0: Initial Version Rev. A Page 2 of 36