3 V, LVDS, Quad, CMOS Differential Line Driver ADN4665 FEATURES FUNCTIONAL BLOCK DIAGRAM 15 kV ESD protection on output pins V CC ADN4665 400 Mbps (200 MHz) switching rates D D IN4 IN1 100 ps typical differential skew D4 D1 400 ps maximum differential skew 2 ns maximum propagation delay D D OUT1+ OUT4+ 3.3 V power supply D D OUT1 OUT4 350 mV differential signaling EN EN Low power dissipation (13 mW typical) Interoperable with existing 5 V LVDS receivers D D OUT3 OUT2 High impedance on LVDS outputs on power-down D D OUT3+ OUT2+ Conforms to TIA/EIA-644 LVDS standards Industrial operating temperature range: 40C to +85C D3 D2 Available in surface-mount SOIC package and low profile D IN2 D IN3 TSSOP package GND APPLICATIONS Figure 1. Backplane data transmission Cable data transmission Clock distribution GENERAL DESCRIPTION The ADN4665 is a quad-channel, CMOS, low voltage differential The ADN4665 also offers active high and active low enable/ signaling (LVDS) line driver offering data rates of over 400 Mbps disable inputs (EN and EN). These inputs control all four drivers (200 MHz) and ultralow power consumption. and turn off the current outputs in the disabled state to reduce the quiescent power consumption to typically 10 mW. The device accepts low voltage TTL/CMOS logic signals and converts them to a differential current output of typically 3.5 mA The ADN4665 offers a new solution to high speed, point-to-point for driving a transmission medium such as a twisted pair cable. data transmission and offers a low power alternative to emitter- The transmitted signal develops a differential voltage of typi- coupled logic (ECL) or positive emitter-coupled logic (PECL). cally 350 mV across a termination resistor at the receiving end. This voltage is converted back to a TTL/CMOS logic level by an LVDS receiver. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 08085-001ADN4665 TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................6 Applications ....................................................................................... 1 Pin Configuration and Function Descriptions ..............................7 Functional Block Diagram .............................................................. 1 Typical Performance Characteristics ..............................................8 General Description ......................................................................... 1 Theory of Operation .........................................................................9 Revision History ............................................................................... 2 Enable Inputs .................................................................................9 Specif icat ions ..................................................................................... 3 Applications Information .............................................................9 Timing Characteristics ................................................................ 4 Outline Dimensions ....................................................................... 10 Absolute Maximum Ratings ............................................................ 6 Ordering Guide .......................................................................... 10 REVISION HISTORY 5/09Revision 0: Initial Version Rev. 0 Page 2 of 12