3 V, LVDS, Quad CMOS Differential Line Receiver ADN4666 FEATURES FUNCTIONAL BLOCK DIAGRAM 8 kV ESD IEC 61000-4-2 contact discharge on receiver input pins V ADN4666 CC 400 Mbps (200 MHz) switching rates R R IN1 IN4 R R 100 ps channel-to-channel skew (typical) IN1+ IN4+ 100 ps differential skew (typical) R1 R4 3.3 ns propagation delay (maximum) R R OUT1 OUT4 3.3 V power supply EN High impedance outputs on power-down EN Low power design (10 mW quiescent typical) Interoperable with existing 5 V LVDS drivers R R OUT2 OUT3 Accepts small swing (350 mV typical) differential input signal levels R2 R3 Supports open, short, and terminated input fail-safe R R IN2+ IN3+ Conforms to TIA/EIA-644 LVDS standard R R IN2 IN3 Industrial operating temperature range of 40C to +85C GND Available in surface-mount SOIC package and low profile Figure 1. TSSOP package APPLICATIONS Point-to-point data transmission Multidrop buses Clock distribution networks Backplane receivers GENERAL DESCRIPTION The ADN4666 is a quad-channel, CMOS low voltage differential disable the receivers and switch the outputs to a high impedance signaling (LVDS) line receiver offering data rates of over 400 Mbps state. Consequently, the outputs of one or more ADN4666 (200 MHz) and ultralow power consumption. devices can be multiplexed together to reduce the quiescent power consumption to 10 mW typical. The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-ended, 3 V TTL/CMOS The ADN4666 and its companion driver, the ADN4665, offer logic level. a new solution to high speed, point-to-point data transmission and offer a low power alternative to emitter-coupled logic (ECL) The ADN4666 also offers active high and active low enable/disable or positive emitter-coupled logic (PECL). inputs (EN and EN) that control all four receivers. These inputs Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 08097-001ADN4666 TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................6 Applications ....................................................................................... 1 Pin Configuration and Function Descriptions ..............................7 Functional Block Diagram .............................................................. 1 Typical Performance Characteristics ..............................................8 General Description ......................................................................... 1 Theory of Operation .........................................................................9 Revision History ............................................................................... 2 Enable Inputs .................................................................................9 Specif icat ions ..................................................................................... 3 Applications Information .............................................................9 Timing Specifications .................................................................. 4 Outline Dimensions ....................................................................... 10 Absolute Maximum Ratings ............................................................ 6 Ordering Guide .......................................................................... 10 REVISION HISTORY 6/09Revision 0: Initial Version Rev. 0 Page 2 of 12