Thermoelectric Cooler (TEC) Controller Data Sheet ADN8831 FEATURES GENERAL DESCRIPTION 1 Two integrated zero drift, rail-to-rail, chop amplifiers The ADN8831 is a monolithic TEC controller. It has two inte- TEC voltage and current operation monitoring grated, zero drift, rail-to-rail comparators, and a PWM driver. Programmable TEC maximum voltage and current A unique PWM driver works with an analog driver to control Programmable TEC current heating and cooling limits external selected MOSFETs in an H-bridge. By sensing the Configurable PWM switching frequency up to 1 MHz thermal detector feedback from the TEC, the ADN8831 can Power efficiency: > 90% drive a TEC to settle the programmable temperature of a laser Temperature lock indication diode or a passive component attached to the TEC module. Optional internal or external clock source The ADN8831 supports NTC thermistors or positive tempera- Clock phase adjustment for multiple drop operation ture coefficient (PTC) RTDs. The target temperature is set as an Supports negative temperature coefficient (NTC) thermistors analog voltage input either from a DAC or from an external or positive temperature coefficient (PTC) resistance resistor divider driven by a reference voltage source. thermal detectors (RTDs) A proportional integral differential (PID) compensation 5 V typical and optional 3 V supplies network helps to quickly and accurately stabilize the ADN8831 Standby and shutdown mode availability thermal control loop. An adjustable PID compensation network Adjustable soft start feature example is described in the AN-695 Application Note, Using the 5 mm 5 mm 32-lead LFCSP ADN8831 TEC Controller Evaluation Board. A typical reference APPLICATIONS voltage of 2.5 V is available from the ADN8831 for thermistor Thermoelectric cooler (TEC) temperature control temperature sensing or for TEC voltage/current measuring and DWDM optical transceiver modules limiting in both cooling and heating modes. Optical fiber amplifiers Optical networking systems Instruments requiring TEC temperature control FUNCTIONAL BLOCK DIAGRAM ILIMC ILIMH ITEC VLIM VTEC CS LIMITER/MONITOR LFB IN1P LINEAR AMPLIFIER LPGATE MOSFET Chop1 DRIVER IN1N LNGATE SFB OUT1 SPGATE CONTROL PWM SNGATE MOSFET DRIVER IN2P COMPSW AMPLIFIER Chop2 SW IN2N COMPOSC SOFT START REF OSCILLATOR SHUTDOWN OUT2 SYNCO TMPGD VREF SS/SB SYNCI/SD PHASE FREQ Figure 1. 1 Product is covered by U.S. Patent No. 6,486,643. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20052019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 04663-001ADN8831 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Temperature Lock Indicator ..................................................... 13 Applications ....................................................................................... 1 Soft Start on Power-Up .............................................................. 13 General Description ......................................................................... 1 Shutdown Mode ......................................................................... 13 Functional Block Diagram .............................................................. 1 Standby Mode ............................................................................. 13 Revision History ............................................................................... 2 TEC Voltage/Current Monitor ................................................. 13 Detailed Block Diagram .................................................................. 3 Maximum TEC Voltage Limit .................................................. 13 Specif icat ions ..................................................................................... 4 Maximum TEC Current Limit ................................................. 14 Electrical Characteristics ............................................................. 4 Applications Information .............................................................. 15 Absolute Maximum Ratings ............................................................ 6 Signal Flow .................................................................................. 15 Thermal Characteristics .............................................................. 6 Thermistor Setup ........................................................................ 15 ESD Caution .................................................................................. 6 Thermistor Amplifier (Chop1) ................................................ 15 Pin Configuration and Function Descriptions ............................. 7 PID Compensation Amplifier (Chop2) .................................. 16 Typical Performance Characteristics ............................................. 9 MOSFET Driver Amplifier ....................................................... 17 Theory of Operation ...................................................................... 11 Outline Dimensions ....................................................................... 18 Oscillator Clock Frequency ....................................................... 12 Ordering Guide .......................................................................... 18 Oscillator Clock Phase ............................................................... 12 REVISION HISTORY 9/2019Rev. B to Rev. C Changes to Figure 3 and Table 4 ...................................................... 7 Changes to Theory of Operation Section and Figure 12 .......... 11 Changes to Figure 3 .......................................................................... 7 Changes to Table 4 ............................................................................ 8 Changes to Figure 14 and Figure 15............................................. 11 Updated Outline Dimensions ....................................................... 18 Changes to Oscillator Clock Frequency Section and Oscillator Changes to Ordering Guide .......................................................... 18 Clock Phase Section ....................................................................... 12 Changes to Soft Start on Power-Up Section, Shutdown Mode 9/2018Rev. A to Rev. B Section, Standby Mode Section, and TEC Voltage/Current Added Patent Information .............................................................. 1 Monitor Section .............................................................................. 13 Changes to Figure 17 ...................................................................... 15 8/2012Rev. 0 to Rev. A Changes to PID Compensation Amplifier (Chop2) Section .... 16 Changes to Features and General Description Sections .............. 1 Changes to MOSFET Driver Amplifier Section and Figure 21 ... 17 Moved Figure 2 ................................................................................. 3 Updated Outline Dimensions ....................................................... 18 Changes to Figure 2 .......................................................................... 3 Changes to Ordering Guide .......................................................... 18 Changes to Table 1 ............................................................................ 4 Changes to Table 2 and Table 3 ....................................................... 6 9/2005Revision 0: Initial Version Rev. C Page 2 of 18