800 mA Ultralow Noise,
High PSRR, RF Linear Regulator
Data Sheet
ADM7150
FEATURES TYPICAL APPLICATION CIRCUIT
ADM7150
Input voltage range: 4.5 V to 16 V
V = 6.2V V = 5.0V
IN OUT
Maximum output current: 800 mA
VIN VOUT
C C
IN OUT
Low noise
10F 10F
ON
1.0 V rms total integrated noise from 100 Hz to 100 kHz
EN REF
C
REF
OFF
1.6 V rms total integrated noise from 10 Hz to 100 kHz
BYP
1F
C
BYP
REF_SENSE
Noise spectral density: 1.7 nVHz typical from 10 kHz to 1 MHz 1F
Power supply rejection ratio (PSRR) at 400 mA load
VREG GND
C
REG
>90 dB from 1 kHz to 100 kHz, V = 5 V
OUT
10F
>60 dB at 1 MHz, V = 5 V
OUT
Figure 1. 5 V Output Circuit
Dropout voltage: 0.6 V at V = 5 V, 800 mA load
OUT
Initial voltage accuracy: 1%
Voltage accuracy over line, load and temperature: 2%
Quiescent current (I ): 4.3 mA at no load
GND
Low shutdown current: 0.1 A
Stable with a 10 F ceramic output capacitor
Fixed output voltage options: 1.8 V, 2.8 V, 3.0 V, 3.3 V, 4.5 V,
4.8 V, and 5.0 V (16 outputs between 1.5 V and 5.0 V are
available)
Exposed pad 8-lead LFCSP and 8-lead SOIC packages
APPLICATIONS
Regulated power noise sensitive applications
RF mixers, phase-locked loops (PLLs), voltage-controlled
oscillators (VCOs), and PLLs with integrated VCOs
Communications and infrastructure
Cable digital-to-analog converter (DAC) drivers
Backhaul and microwave links
GENERAL DESCRIPTION
The ADM7150 is a low dropout (LDO) linear regulator that footprint. See the ADM7151 adjustable LDO to generate additional
operates from 4.5 V to 16 V and provides up to 800 mA of output voltages.
output current. Using an advanced proprietary architecture, it 100k
C = 1F
BYP
provides high power supply rejection (>90 dB from 1 kHz to 1 MHz),
C = 10F
BYP
C = 100F
BYP
ultralow output noise (<1.7 nVHz), and achieves excellent line and
10k C = 1mF
BYP
load transient response with a 10 F ceramic output capacitor.
The ADM7150 is available in 1.8 V, 2.8 V, 3.0 V, 3.3 V, 4.5 V,
1k
4.8 V, and 5.0 V fixed outputs. In addition, 16 fixed output
voltages between 1.5 V and 5.0 V are available upon request.
100
The ADM7150 regulator typical output noise is 1.0 V rms
from 100 Hz to 100 kHz for fixed output voltage options, and
10
the noise spectral density is 1.7 nV/Hz from 10 kHz to 1 MHz.
The ADM7150 is available in 8-lead, 3 mm 3 mm LFCSP and
1
8-lead SOIC packages, making it not only a very compact solution
0.1 1 10 100 1k 10k 100k 1M
but also providing excellent thermal performance for applications
FREQUENCY (Hz)
requiring up to 800 mA of output current in a small, low profile
Figure 2. Noise Spectral Density (NSD) vs. Frequency for Various CBYP
Rev. 0 Document Feedback
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NOISE SPECTRAL DENSITY (nV/Hz)
11043-001
11043-002ADM7150 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1 Typical Performance Characteristics ..............................................7
Applications ....................................................................................... 1 Theory of Operation ...................................................................... 15
Typical Application Circuit ............................................................. 1 Applications Information .............................................................. 16
General Description ......................................................................... 1 Capacitor Selection .................................................................... 16
Revision History ............................................................................... 2 Enable (EN) and Undervoltage Lockout (UVLO) ................. 17
Specifications ..................................................................................... 3 Start-Up Time ............................................................................. 18
Input and Output Capacitor Recommended Specifications ... 4 REF, BYP, and, VREG pins ........................................................ 18
Absolute Maximum Ratings ............................................................ 5 Current-Limit and Thermal Overload Protection ................. 19
Thermal Data ................................................................................ 5 Thermal Considerations ............................................................ 19
Thermal Resistance ...................................................................... 5 Printed Circuit Board Layout Considerations........................ 21
ESD Caution .................................................................................. 5 Outline Dimensions ....................................................................... 22
Pin Configurations and Function Descriptions ........................... 6 Ordering Guide .......................................................................... 22
REVISION HISTORY
9/13Revision 0: Initial Version
Rev. 0 | Page 2 of 24